ratio (>10 3 ) between the amorphous and crystalline phase of chalcogenides glasses, mainly compounds of the ternary Ge x Sb y Te z . The phase transition is triggered by Ovonic threshold switching, [1,11] where the resistance of the chalcogenide is reduced above a certain threshold voltage, enabling high current densities, and selfheating for crystallization.The memory cell structure consists of a phase change material, such as, Ge 2 Sb 2 Te 5 (GST), sandwiched between two electrodes. Electrical current crowding is achieved by either a small-area heater bottom electrode (BE) in a mushroom-type cell, or a narrow pore in the surrounding dielectric of the PCM layer in a so-called confined cell. [2] To crystallize the PCM (i.e., set) to its low resistance state (LRS), a medium-amplitude voltage or current pulse is applied, which heats the material above its crystallization temperature. The set pulse must be sufficiently long to allow for the material to crystallize. To amorphize the cell (i.e., reset) to its high resistance state (HRS), a large-amplitude electrical pulse is applied for a short time (or with a short fall time) to melt the material and rapidly quench it below the crystallization temperature. [2,12,13] Because the phase transition is thermally induced, devicelevel heat management is crucial. The energy and power consumption are of great concern, and their fundamental limits are yet to be fully understood. [14] Particularly, the reset process includes heating the phase change material above its melting temperature (typically T m > 600 °C) which requires very high power density, on the order of ≈10 MW cm −2 (100 mW µm −2 ). Reports on the values of reset power (during the pulse) and energy are scarce because of the need to capture the current and voltage during a short transient (typically less than 100 ns), but the reported energies per area are in the range of ≈1 J cm −2 (10 nJ µm −2 ). [15,16] Previous research efforts toward improving energy-efficiency (heating energy per device area) of the meltquench process in PCM focused on thermal engineering of materials, [17,18] interfaces, [19,20] and device structure. [21,22] However, the range of thermal properties of materials and their interfaces is limited. [23] In this article, we probe the power dissipation dynamics of PCM reset with sub-nanosecond (ns) resolution and show that the energy efficiency improves with the reduction of Phase change memory (PCM) is one of the leading candidates for neuromorphic hardware and has recently matured as a storage class memory. Yet, energy and power consumption remain key challenges for this technology because part of the PCM device must be self-heated to its melting temperature during reset. Here, it is shown that this reset energy can be reduced by nearly two orders of magnitude by minimizing the pulse width. A high-speed measurement setup is utilized to probe the energy consumption in PCM cells with varying pulse width (0.3-40 nanoseconds) and uncover the power dissipation dynamics. A key finding is that the swit...
