We have synthesized ternary InGaAs nanowires on (111)B GaAs surfaces by metal-organic chemical vapor deposition. Au colloidal nanoparticles were employed to catalyze nanowire growth. We observed the strong influence of nanowire density on nanowire height, tapering, and base shape specific to the nanowires with high In composition. This dependency was attributed to the large difference of diffusion length on (111)B surfaces between In and Ga reaction species, with In being the more mobile species. Energy dispersive X-ray spectroscopy analysis together with high-resolution electron microscopy study of individual InGaAs nanowires shows large In/Ga compositional variation along the nanowire supporting the present diffusion model. Photoluminescence spectra exhibit a red shift with decreasing nanowire density due to the higher degree of In incorporation in more sparsely distributed InGaAs nanowires.

What's in a wire? To determine the fundamental reason for obtaining tapered nanowires, GaAs nanowires were grown on {111}B GaAs substrates. Their novel structural characteristics (e.g., a truncated triangular cross section at the base of the nanowires; see image) were carefully investigated using high‐resolution SEM and various TEM techniques. Based on the obtained structural characteristics of these nanowires and the growth environment, an asymmetrical lateral‐growth mechanism has been identified.

The influence of the droplet composition on the vapor-liquid-solid growth of InAs nanowires on GaAs ( 1 ¯ 1 1 ¯ ) B by metal-organic vapor phase epitaxy

Gold on the move…︁ A novel growth phenomenon of axial InAs/GaAs nanowire heterostructures catalyzed by Au particles was observed. Transmission electron microscopy has determined a sequence of events: 1) Displacement of the Au particle at the end of the nanowire due to InAs clustering, 2) further InAs growth leading to sideways movement of the Au particle, and 3) eventual downward nanowire growth due to the preservation of a Au/GaAs interface (see scheme).

Highly lattice mismatched (7.8%) GaAs∕GaSb nanowire heterostructures were grown by metal-organic chemical vapor deposition and their detailed structural characteristics were determined by electron microscopy. The facts that (i) no defects have been found in GaSb and its interfaces with GaAs and (ii) the lattice mismatch between GaSb∕GaAs was fully relaxed suggest that the growth of GaSb nanowires is purely governed by the thermodynamics. The authors believe that the low growth rate of GaSb nanowires leads to the equilibrium growth.

Integrating high electron mobility III−V materials on an existing Si based CMOS processing platform is considered as a main stepping stone to increase the CMOS performance and continue the scaling trend. Owing to the polar nature of III−V materials versus the nonpolar nature of Si, antiphase boundaries (APBs) arise in epitaxially grown III− V materials on Si. Here, we demonstrate an approach to restrict the generation of APBs by selectively depositing a III− V material in narrow Si-trenches as formed within the shallow trench isolation (STI) patterned Si(001) wafers. Based on the detailed crystal structures of Si and III−V materials, a concept has been developed comprising the deposition in "v-grooves" with {111} facets in the Si wafer. The grooves are formed by anisotropic wet etching of Si. When InP is deposited selectively into these "v-grooves", the crystallographic alignment between the Si and InP restricts the APBs nucleation to the corners of the "vgrooved" trench. This approach offers a promising method of large-scale integration of III−V materials on Si as required for the fabrication of novel logic and photonic devices.

The evolution of InAs nanowires on the GaAs (111)B substrate by metal–organic chemical vapor deposition shows that InAs traces are formed and elongated first, driven by the liquid Au catalysts preferentially retaining interfaces with the GaAs substrate due to the Au/GaAs interfacial energy being lower than that of Au/InAs. Vertical InAs nanowires initiate when elongated traces intersect (see image).

On-chip optical interconnects still miss a high-performance laser monolithically integrated on silicon. Here, we demonstrate a silicon-integrated InP nanolaser that operates at room temperature with a low threshold of 1.69 pJ and a large spontaneous emission factor of 0.04. An epitaxial scheme to grow relatively thick InP nanowires on (001) silicon is developed. The zincblende/wurtzite crystal phase polytypism and the formed type II heterostructures are found to promote lasing over a wide wavelength range.