The ferroelectric properties and crystal structure of doped HfO2 thin films were investigated for different thicknesses, electrode materials, and annealing conditions. Metal-ferroelectric-metal capacitors containing Gd:HfO2 showed no reduction of the polarization within the studied thickness range, in contrast to hafnia films with other dopants. A qualitative model describing the influence of basic process parameters on the crystal structure of HfO2 was proposed. The influence of different structural parameters on the field cycling behavior was examined. This revealed the wake-up effect in doped HfO2 to be dominated by interface induced effects, rather than a field induced phase transition. TaN electrodes were shown to considerably enhance the stabilization of the ferroelectric phase in HfO2 compared to TiN electrodes, yielding a P-r of up to 35 mu C/cm(2). This effect was attributed to the interface oxidation of the electrodes during annealing, resulting in a different density of oxygen vacancies in the Gd:HfO2 films. Ab initio simulations confirmed the influence of oxygen vacancies on the phase stability of ferroelectric HfO2

ZrO2 is of very high interest for various applications in semiconductor industry especially as high-k dielectric in metal–insulator–metal (MIM) capacitor devices. Further improvement of deposition processes, of material properties, and of integration schemes is essential in order to meet the strict requirements of future devices. In this paper, the authors describe a solution to solve one of the key challenges by reducing the process time of the bottle neck high-k atomic layer deposition (ALD). The authors extensively optimized the most common ALD process used for the ZrO2 deposition (TEMAZ/O3) resulting now in a doubled growth rate compared to the published growth rates of maximum 1 Å/cycle. Chemical reactions explaining the origin of the high growth rate are proposed by theoretical process modelling. At the same time, the outstanding electrical properties of ZrO2 thin films could be preserved. Finally, the integration of the ZrO2 process in MIM capacitor devices with TiN electrodes was evaluated. Thereby, the known effect of TiN bottom electrode oxidation by the O3 process was analyzed and significantly reduced by different integration approaches including wet chemical treatments and ALD process variations. The resulting MIM capacitors show low leakage current and high polarity symmetry.

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Reconfigurable field effect transistors are an emerging class of electronic devices, which exploit a structure with multiple independent gates to selectively adjust the charge carrier transport. Here, we propose a new device variant, where not only p-type and n-type operation modes, but also an ambipolar mode can be selected solely by adjusting a single program voltage. It is demonstrated how the unique device reconfigurability of the new variant can be exploited for analog circuit design. The non-linearity of the ambipolar mode can be used for frequency doubling without the generation of additional harmonics. Further, phase shifter and follower circuits are enabled by the n- and p-type modes, respectively. All three functions can be combined to create a 3-to-1 reconfigurable analog signal modulation circuit on a single device enabling wireless communication schemes. Both, the concept as well as the application have been experimentally demonstrated on industrial-scale fully-depleted SOI platform. The special transport physics in those structures has been analyzed by TCAD simulations as well as temperature dependent measurements.

Fast progress in nanometer-node high-k metal gate (HKMG) technology requires the development of versatile and detailed characterization methods for semiconductor / dielectric / metal stacks and interfaces between them. Complexity of the advanced fabrication processes does not allow preparation of model samples with dimensions used in standard laboratory measurements. In this report we apply capacitance transient spectroscopy measurements for the characterization of HKMG field effect transistors (FET) fabricated in the standard 28 nm node technology. Measurements were performed on n-FET devices. The devices were characterized in the as-fabricated stage, after application of electrical stress and after fluorine implantation introduced to passivate the interface carrier traps. Our results show good correspondence with those obtained by other characterization methods and supply detailed information on the energy distribution of the interface trap density in the system.