SUMMARYIn this paper, we study the requirements for electronic design automation (EDA) tools in deep-submicron technologies and identify critical factors for programmable logic devices. We also propose a clustering technique for a cluster-based FPGA to optimize routability of outer cluster nets. In order to reduce the routing resources used in FPGA, this technique uses two evaluation functions. One evaluation function reduces the routing resources in the outer cluster. The second evaluation function utilizes various characteristics of the local routing resources in the inner cluster. Our clustering technique has the unique ability to optimize routing resources concurrently. As a result, the area is decreased by 13.5%, and the delay is reduced by 9.3% as compared to the latest clustering tool in benchmark circuits.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.