The aim of this study was to develop a LightCycler-based real-time PCR (LC-PCR) assay and to evaluate its diagnostic use for the detection of Brucella DNA in serum samples. Following amplification of a 223-bp gene sequence encoding an immunogenetic membrane protein (BCSP31) specific for the Brucella genus, melting curve and DNA sequencing analysis was performed to verify the specificity of the PCR products. The intra- and inter-assay variation coefficients were 1.3% and 6.4%, respectively, and the detection limit was 5 fg of Brucella DNA (one genome equivalent). After optimisation of the PCR assay conditions, a standard curve was obtained with a linear range (correlation coefficient=0.99) over seven orders of magnitude from 10(7) to 10 fg of Brucella DNA. The LC-PCR assay was found to be 91.9% sensitive and 95.4% specific when tested with 65 negative control samples and 62 serum samples from 60 consecutive patients with active brucellosis. The assay is reproducible, easily standardised, minimises the risk of infection in laboratory workers, and has a total processing time of <2 h. It could therefore form a promising and practical approach for the rapid diagnosis of human brucellosis.

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Abstract-We propose a floating-point representation to deal efficiently with arithmetic operations in codes with a balanced number of additions and multiplications for FPGA devices. The variable shift operation is very slow in these devices. We propose a format that reduces the variable shifter penalty. It is based on a radix-64 representation such that the number of the possible shifts is considerably reduced. Thus, the execution time of the floating-point addition is highly optimized when it is performed in an FPGA device, which compensates for the multiplication penalty when a high radix is used, as experimental results have shown. Consequently, the main problem of previous specific highradix FPGA designs (no speedup for codes with a balanced number of multiplications and additions) is overcome with our proposal. The inherent architecture supporting the new format works with greater bit precision than the corresponding single precision (SP) IEEE-754 standard.