Low-temperature epitaxial growth of Si–Ge heterostructures opens possibilities for synthesizing very small and abrupt low-dimensional structures due to the low adatom surface mobilities. We present photoluminescence from Ge quantum structures grown by molecular-beam epitaxy at low temperatures which reveals a transition from two-dimensional to three-dimensional growth. Phononless radiative recombination is observed from 〈105〉 faceted Ge quantum dots with height of approximately 0.9 nm and lateral width of 9 nm. Postgrowth annealing reveals a systematic blueshift of the Ge quantum dot’s luminescence and a reduction in nonradiative recombination channels. With increasing annealing temperatures Si–Ge intermixing smears out the three-dimensional carrier localization around the dot.

Intense photoluminescence (PL) originating from single layers of germanium hut clusters grown on silicon (001) is investigated using PL spectroscopy. We propose that the luminescence originates from phononless recombination within a spatially indirect, type-II neighboring confinement structure. Enhanced no-phonon (NP) luminescence is attributed to exciton localization at the Ge/Si interfaces. The PL intensity is sensitive to the growth temperature during interface formation, as well as to post-growth thermal annealing, illustrating the influence of atomic-level Si–Ge intermixing on exciton localization and NP enhancement.

Abstract-In

Resonant interband tunneling diodes on silicon substrates are demonstrated using a Si/Si 0.5 Ge 0.5 /Si heterostructure grown by low temperature molecular beam epitaxy which utilized both a central intrinsic spacer and ␦-doped injectors. A low substrate temperature of 370°C was used during growth to ensure a high level of dopant incorporation. A B ␦-doping spike lowered the barrier for holes to populate the quantum well at the valence band discontinuity, and an Sb ␦-doping reduces the doping requirement of the n-type bulk Si by producing a deep n ϩ well. Samples studied from the as-grown wafers showed no evidence of negative differential resistance ͑NDR͒. The effect of postgrowth rapid thermal annealing temperature was studied on tunnel diode properties. Samples which underwent heat treatment at 700 and 800°C for 1 min, in contrast, exhibited NDR behavior. The peak-to-valley current ratio ͑PVCR͒ and peak current density of the tunnel diodes were found to depend strongly on ␦-doping placement and on the annealing conditions. PVCRs ranging up to 1.54 were measured at a peak current density of 3.2 kA/cm 2 .

We present the characteristics of uniformly doped silicon Esaki tunnel diodes grown by low temperature molecular beam epitaxy (= 275 C) using in situ boron and phosphorus doping. The effects of ex situ thermal annealing are presented for temperatures between 640 and 800 C. A maximum peak to valley current ratio (PVCR) of 1.47 was obtained at the optimum annealing temperature of 680 C for 1 min. Peak and valley (excess) currents decreased more than two orders of magnitude as annealing temperatures and times were increased with rates empirically determined to have thermal activation energies of 2.2 and 2.4 eV respectively. The decrease in current density is attributed to widening of the tunneling barrier due to the diffusion of phosphorus and boron. A peak current density of 47 kA/cm 2 (PVCR = 1 3) was achieved and is the highest reported current density for a Si-based Esaki diode (grown by either epitaxy or by alloying). The temperature dependence of the current voltage characteristics of a Si Esaki diode in the range from 4.2 to 325 K indicated that both the peak current and the excess current are dominated by quantum mechanical tunneling rather than by recombination. The temperature dependence of the peak and valley currents is due to the band gap dependence of the tunneling probability.

Effect of low-energy N 2 + ion beam bombardment on silicate glass thin films studied by x-ray photoelectron spectroscopy Knowledge of the mechanical properties of interlevel dielectric films and their impact on submicron interconnect reliability is becoming more and more important as critical dimensions in ultralarge scale integrated circuits are scaled down. For example, lateral aluminum ͑Al͒ extrusions into spaces between metal lines, which become more of a concern as the pitches shrink, appear to depend partially on properties of SiO 2 underlayers. In this article nanoindentation, wafer curvature, and infrared absorbance techniques have been used to study the mechanical properties of several common interlevel dielectric SiO 2 films such as undoped silica glass using a silane (SiH 4 ) precursor, undoped silica glass using a tetraethylorthosilicate precursor, phosphosilicate glass deposited by plasma-enhanced chemical vapor deposition and borophosphosilicate glass ͑BPSG͒ deposited by subatmosphere chemical vapor deposition. The elastic modulus E and hardness H of the as-deposited and densified SiO 2 layers are measured by nanoindentation. The coefficients of thermal expansion ͑CTE͒ of the densified layers are estimated by temperature-dependent wafer curvature measurements. Fourier transform infrared spectroscopy is used to obtain the chemical structures of all SiO 2 layers. Among the four common interlevel layers, BPSG exhibits the smallest modulus/ hardness and a relatively small amount of moisture loss during anneal. The BPSG shows the highest CTE, which generates the smallest thermal stress due to a closer match in the CTE between Al and SiO 2 . BPSG again has the lowest as-deposited compressive stress and the lowest local Si-O-Si strain before annealing. The center frequency of the Si-O bond stretching vibration exhibits a linear dependence on total film stress. The shifts of Si-O peaks for all the SiO 2 layers also correlate well with the stress hysteresis obtained from wafer curvature measurements. Stress interactions between the various SiO 2 underlayers and the Al metal film are also investigated. The impact of dielectric elastic properties on interconnect reliability during thermal cycles is proposed.

The structural, optical, and electronic properties of an insulating material prepared by the thermal oxidation of AlN thin films on Si have been studied by a number of different experimental techniques. The thermal oxidation at 1100°C of reactively sputtered AlN films on Si wafers was found to result in the formation of an oxide with a relative Al to O concentration near Al 2 O 3 with small amounts of incorporated N. The structure of the AlO:N oxide could be varied between amorphous and polycrystalline, depending on the preparation conditions, and the oxide surface was found to be approximately three time smoother than the as-sputtered AlN films. Metal-oxidesilicon capacitors had an oxide charge density of about 10 11 cm Ϫ2 , capacitance-voltage characteristics similar to pure SiO 2 , and a dielectric constant of 12.4. Infrared measurements yielded a refractive index of 3.9. These results indicate that thermally oxidized AlN films show promise as insulating structures for many integrated circuit applications, particularly for the case of III-V and group III-nitride based semiconductors.

Abstract. Thermophotovoltaic (TPV) diodes fabricated from 0.52eV lattice-matched InGaAsSb alloys are grown by Metal Organic Vapor Phase Epitaxy (MOVPE) on GaSb substrates. 4cm 2 multi-chip diode modules with front-surface spectral filters were tested in a vacuum cavity and attained measured efficiency and power density of 19% and 0.58 W/cm 2 respectively at operating at temperatures of T radiator = 950 °C and T diode = 27 °C. Device modeling and minority carrier lifetime measurements of double heterostructure lifetime specimens indicate that diode conversion efficiency is limited predominantly by interface recombination and photon energy loss to the GaSb substrate and back ohmic contact. Recent improvements to the diode include lattice-matched p-type AlGaAsSb passivating layers with interface recombination velocities less than 100 cm/s and new processing techniques enabling thinned substrates and back surface reflectors. Modeling predictions of these improvements to the diode architecture indicate that conversion efficiencies from 27-30% and ~0.85 W/cm 2 could be attained under the above operating temperatures.