A novel CMOS device architecture called silicon on nothing (SON) is proposed, which allows extremely thin (in the order of a few nanometers) buried dielectrics and silicon films to be fabricated with high resolution and uniformity guarantied by epitaxial process. The SON process allows the buried dielectric (which may be an oxide but also an air gap) to be fabricated locally in dedicated parts of the chip, which may present advantages in terms of cost and facility of system-on-chip integration. The SON stack itself is physically confined to the under-gate-plus-spacer area of a device, thus enabling extremely shallow and highly doped extensions, while leaving the HDD (highly doped drain) junctions comfortably deep. Therefore, SON embodies the ideal device architecture taking the best elements from both bulk and SOI and getting rid of their drawbacks. According to simulation results, SON enables excellent Ion/Ioff trade-off, suppressed self-heating, low S/D series resistance, close to ideal subthreshold slope, and high immunity to SCE and DIBL down to ultimate device dimensions of 30 to 50 nm.

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A new concept of dielectric pockets is proposed allowing suppression of SCE and DIBL without increasing the channel doping. The dielectric pockets have been implanted into 0.15µm PMOS devices showing substantial efficiency in reducing SCE and IOFF current without altering the current drive. The dielectric pockets thus embody the ideal pocket architecture.

Direct nitridation of the silicon substrate using gaseous NO at 550–700°C, 10 mbar is studied using physical (SIMS, TEM, XPS) and electrical characterisations. The nitrogen profile can be tailored for the fabrication of thin nitrided oxides as in the case of implanted nitrogen. Degradation of the I(V) characteristics has been evidenced when the nitrogen amount increases.