Over the last several years, there has been a growing interest in neural implants for the study and diagnostics of neurological disorders as well as for the symptomatic treatment of central nervous system related diseases. One of the major challenges is the trade-off between small electrode sizes for high selectivity between single neurons and large electrode-tissue interface areas for excellent stimulation and recording properties. This paper presents an approach of increasing the real surface area of the electrodes by creating a surface microstructure. Two major novelties let this work stand out from existing approaches which mainly make use of porous coatings such as platinum black or iridium oxide, or Poly(3,4-ethylenedioxythiophene) (PEDOT). Roughening is carried out by a dry etching process on the silicon electrode core before being coated by a sputtered platinum layer, eliminating complicated deposition processes as for the materials described above. The technology is compatible with any commonly used coating material. In addition, the surface roughening is compatible with high aspect ratio penetrating electrode arrays such as the well-established Utah electrode array, whose unique geometry presents a challenge in the surface modification of active electrode sites. The dry etching process is well characterized and yields a high controllability of pore size and depth. This paper confirms the superior electrochemical properties including impedance, charge injection capacity, and charge storage capacity of surface engineered electrode arrays compared to conventional arrays over a period of 12 weeks. Furthermore, mechanical stability of the modified electrodes was tested by implantation in the brain of a recently deceased rat. In conclusion, the larger interface surface of the electrodes does not only decrease the impedance which should lead to enhanced Signal to noise ratio (SNR) for recording purposes, but also yields higher charge injection capacities, which improve the stimulation characteristics of the implants.

In various applications such as neural prostheses or solar cells, there is a need to alter the surface morphology of high aspect ratio structures so that the real surface area is greater than geometrical area. The change in surface morphology enhances the devices functionality. One of the applications of altering the surface morphology is of neural implants such as the Utah electrode array (UEA) that communicate with single neurons by charge injection induced stimulation or by recording electrical neural signals. For high selectivity between single cells of the nervous system, the electrode surface area is required to be as small as possible, while the impedance is required to be as low as possible for good signal to noise ratios (SNR) during neural recording. For stimulation, high charge injection and charge transfer capacities of the electrodes are required, which increase with the electrode surface. Traditionally, researchers have worked with either increasing the roughness of the existing metallization (Platinum grey, black) or other materials such as Iridium Oxide and PEDOT. All of these previously investigated methods lead to more complicated metal deposition processes that are difficult to control and often have a critical impact on the mechanical properties of the metal films. Therefore, a modification of the surface underneath the electrode’s coating will increase its surface area while maintaining the standard and well controlled metal deposition process. In this work, the surfaces of the Silicon micro-needles were engineered by creating a defined microstructure on the electrodes surface using several methods such as Laser ablation, focused ion beam, sputter etching, reactive ion etching (RIE) and deep reactive ion etching (DRIE). The surface modification processes were optimized for the high aspect ratio Silicon structures of the UEA. The increase in real surface area while maintaining the geometrical surface area was verified using scanning electron microscopy (SEM) and electrochemical impedance spectroscopy (EIS). The best results were obtained by DRIE induced surface morphology. Decreases in impedance values of electrodes up to 76 % indicate the successful surface engineering of the high aspect ratio Silicon structures.

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