It has been shown recently that the low voltage gate current in ultrathin oxide metal–oxide–semiconductor devices is very sensitive to electrical stresses. Therefore it can be used as a reliability monitor when the oxide thickness becomes too small for traditional electrical measurements to be used. This paper presents a thorough study of the low voltage gate current variation for different uniformed or localized electrical stress conditions at or above room temperature, and for various oxide thicknesses ranging from 1.2 to 2.5 nm. As it has been proposed recently that this current could be due to electron tunneling through Si/SiO2 interface states, the results obtained in the thicker oxides for the gate current have been compared with the corresponding surface state density variations measured by charge pumping. It is shown that there is no clear relation between low voltage gate current increase after stress and that of surface state density, and that soft or hard oxide breakdown happens when the low voltage current reaches a critical value independently of the stress created interface state density.
The variations with temperature of the Fowler–Nordheim (FN) emission in metal–oxide–semiconductor structures when the injecting electrode is the degenerate polysilicon gate (n+) are investigated. The temperature dependence of the electron affinity difference Φ between Si and SiO2 and of the barrier height Φb for three oxide thicknesses (5, 7, and 12 nm) are analyzed. The results are numerically derived from the exact integral expression of the FN current as functions of temperature varying from 25 to 300 °C. The variation with temperature of both the obtained Φ and dΦ/dT parameters at the polysilicon (n+)–oxide barrier are discussed with respect to the literature data.
We have developed a capacitance–voltage (C–V) and a current–voltage (I–V) quasistatic quantum model of ultrathin metal–oxide–semiconductor (MOS) structures based on the self-consistent solution of the Schrödinger and Poisson equations. The direct tunneling current takes into account the carrier distribution in energy subbands and uses the notions of corrected tunnel transparency and of impact frequency at the injecting electrode. These models are used to obtain the main physical parameters of n+-polysilicon/SiO2/〈100〉 p-Si MOS structures, with oxide thickness ranging from 1.2 to 3.5 nm. The extracted parameters are the oxide thickness (TOX), the substrate doping, both at the Si/SiO2 interface [NS(0)] and deep in the bulk [NS(∞)], and the polysilicon gate doping (NP) near the polysilicon/SiO2 interface. For this range of oxide thickness, the direct tunneling current strongly perturbs the C–V measurements, which must be corrected. Down to 1.5 nm oxide thickness, these parameters are obtained by C–V characterization. Below 1.5 nm oxide thickness, the C–V correction fails and TOX is obtained by a coupled C–V and I–V characterization procedure, based on the adjustment of the effective mass of the electrons in the oxide (mOX) with the oxide thickness. The whole characterization procedure provides TOX values with associated errors very close to the ellipsometric measurements. The information obtained on the substrate doping seems to correspond well with advanced MOS technologies. The C–V and I–V simulation results are in good agreement with measurements for all the samples and a good consistency is found between the C–V and I–V models. Finally, we show that the extracted TOX obtained with the variation of mOX with TOX provide a better agreement than those with a constant mOX value, compared to the ellipsometric measurements.
The creation of defects into a thin gate oxide (11 nm) of polycrystalline silicon-oxide-semiconductor capacitors by electron injection Fowler–Nordheim effect, their electric nature, and their behavior when stressed samples are submitted to a white-light illumination in the inversion regime are studied. It is shown that low-electron-injected fluences cause creation of positive charges and that high fluences generate negative charges in the bulk of the oxide. Current-voltage characteristics have been performed in the accumulation and the inversion regimes before and after electron injection. These characteristics show a very weak shift and a small distortion which seem to indicate that the negative charges are localized close to the injecting electrode and the positive charges near to the Si/SiO2 interface. These positive charges are annihilated by light illumination without interface-state generation when stressed samples are biased in the inversion regime. Interface states do not show any saturation and their analytical expression versus injected charge contains two different terms which correspond to two different mechanisms of interface-state creation.
Stress-induced leakage currents in 7 and 12 nm thick gate oxides of metal-oxide-semiconductor capacitors, created by negative or positive high field stress, were investigated in details. It is known that stress-induced leakage currents have several components. One of these components, which is observed for both stress and measurement polarities, increases drastically when the oxide thickness decreases. We have observed that this component magnitude is reduced when a low field of opposite polarity to the stress field is applied to the oxide after stress. This effect does not seem to be due to electron trapping in the oxide bulk, during the low field application. We propose therefore, that this current decrease is due to a defect relaxation phenomena induced by the low field. This proposition is compatible with any defect creation process which involves a stress-field-induced motion of atoms.
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