It has been shown recently that the low voltage gate current in ultrathin oxide metal–oxide–semiconductor devices is very sensitive to electrical stresses. Therefore it can be used as a reliability monitor when the oxide thickness becomes too small for traditional electrical measurements to be used. This paper presents a thorough study of the low voltage gate current variation for different uniformed or localized electrical stress conditions at or above room temperature, and for various oxide thicknesses ranging from 1.2 to 2.5 nm. As it has been proposed recently that this current could be due to electron tunneling through Si/SiO2 interface states, the results obtained in the thicker oxides for the gate current have been compared with the corresponding surface state density variations measured by charge pumping. It is shown that there is no clear relation between low voltage gate current increase after stress and that of surface state density, and that soft or hard oxide breakdown happens when the low voltage current reaches a critical value independently of the stress created interface state density.
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