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We observed reversible-type changes between bipolar (BRS) and unipolar resistance switching (URS) in one Pt/SrTiOx/Pt capacitor. To explain both BRS and URS in a unified scheme, we introduce the “interface-modified random circuit breaker network model,” in which the bulk medium is represented by a percolating network of circuit breakers. To consider interface effects in BRS, we introduce circuit breakers to investigate resistance states near the interface. This percolation model explains the reversible-type changes in terms of connectivity changes in the circuit breakers and provides insights into many experimental observations of BRS which are under debate by earlier theoretical models.

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The high reset current, IR, in unipolar resistance switching is an important issue which should be resolved for practical applications in nonvolatile memories. We showed that, during the forming and set processes, the compliance current, Icomp, can work as a crucial parameter to reduce IR. Doping with Co or Mn can significantly reduce the leakage current in capacitors made using SrTiOx film, opening a larger operation window for Icomp. By decreasing Icomp with acceptor doping, we could reduce IR in SrTiOx films by a factor of approximately 20. Our work suggests that the decrease in Icomp by carrier doping could be a viable alternative for reducing IR in unipolar resistance switching.

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A continuous-time delta-sigma modulator (CT DSM) having a time-interleaved switched-capacitor brief-return-to-zero DAC with first-order jitter noise shaping is proposed to reduce the sensitivity to clock jitter. The proposed CT DSM allows higher power efficiency and lower intersymbol interference by using a time-interleaved nearly full clock period integration with its current returning to zero briefly. Evaluation results indicate that the proposed third-order single-bit CT DSM operating at 168-MHz achieves 79.1 dB SNDR with 50% reduced DAC current for a 2-MHz signal bandwidth having 1% clock jitter as compared with conventional techniques.