Baiocchi G, Raspagliesi F, Grosso G, Fontanelli R, Cobellis L, di Re E, di Re F. Early ovarian cancer: Is there a role for systematic pelvis and para‐aortic lymphadenectomy? Int J Gynecol Cancer 1998; 8: 103–108. In order to focus on the incidence and the clinical significance of lymphatic spread in patients with cancer apparently confined to the ovaries, we present our 20 year experience in a large series of patients with early ovarian cancer who had systematic pelvic and para‐aortic lymphadenectomy. A retrospective study of 280 consecutive patients is presented. Systematic pelvic and para‐aortic lymphadenectomy was performed in 205 cases (73.2%). Selective sampling and node biopsy were performed in 30 (10.7%) and 7 (2.5%), respectively. Node metastases were found in 32/242 patients (13.2%). The incidence of metastatic nodes was significantly higher in patients with serous adenocarcinomas and/or poorly‐differentiated tumors. When few nodes were involved (1–3) lymphatic spread was most ipsilateral to the tumor. Even though the retrospective nature of the study has to be considered, univariate analysis revealed statistically significant differences in 5‐year survival based on FIGO stage, histology, grade of differentiation, and node status. By contrast, using multivariate analysis, none of these risk factors was an independent variable for predicting long‐term survival. However, node status closely approached the statistically significant level (P = 0.06). Only prospective and randomized studies can clarify the role of lymphadenectomy in early ovarian cancer. However, while awaiting these results, this surgical procedure should be a part of a research protocol.

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Critical applications based on Systems-on-Chip (SoCs) require suitable techniques that are able to ensure a sufficient level of reliability. Several techniques have been proposed to improve fault detection and correction capabilities of faults affecting SoCs. This paper proposes a hybrid approach able to detect and correct the effects of transient faults in SoC data memories and caches. The proposed solution combines some software modifications, which are easy to automate, with the introduction of a hardware module, which is independent of the specific application. The method is particularly suitable to fit in a typical SoC design flow and is shown to achieve a better trade-off between the achieved results and the required costs than corresponding purely hardware or software techniques. In fact, the proposed approach offers the same faultdetection and -correction capabilities as a purely software-based approach, while it introduces nearly the same low memory and performance overhead of a purely hardware-based one.

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