Cross-sectioning is a necessary technique for the failure analysis of integrated circuits. Historically, the majority of samples have been prepared for scanning electron microscope (SEM) analysis. Today's smaller geometry devices, however, increasingly require the improved spatial resolution afforded by the transmission electron microscope (TEM), both in imaging analysis and in elemental analysis. Specific-area cross-section TEM (SAXTEM) analysis allows the failure analyst to identify defects that may go undiscovered in the SEM. A procedure is described for a timely preparation of SAXTEM samples using a focused ion beam (FIB) instrument and a manipulator probe. This procedure extends the state-of-the-art in several key respects: A) no mechanical grinding is necessary, B) samples as large as the FIB chamber can be accommodated, e.g., whole wafers, C) multiple samples can be prepared from one die, D) the procedure is faster and more repeatable than previously reported procedures.
Shrinking gate lengths have led to increased challenges in isolating defects using conventional physical failure analysis methods. Conducting atomic force microscopy (CAFM) has been proven to be a powerful tool to isolate gate oxide defects in silicon-on-insulator devices. Some sample preparation techniques of exposing polysilicon and gate oxide, which were critical to perform CAFM scan, are discussed in this paper.
A number of backside analysis techniques rely on the successful use of optical beams in performing backside fault isolation. In this paper, the authors have investigated the influence of the 1340 nm and 1064 nm laser wavelength on advanced CMOS transistor performance.
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