Neuromorphic computing (NC) architecture inspired by biological nervous systems has been actively studied to overcome the limitations of conventional von Neumann architectures. In this work, we propose a reconfigurable NC block using a flash-type synapse array, emerging positive feedback (PF) neuron devices, and CMOS peripheral circuits, and integrate them on the same substrate to experimentally demonstrate the operations of the proposed NC block. Conductance modulation in the flash memory enables the NC block to be easily calibrated for output signals. In addition, the proposed NC block uses a reduced number of devices for analog-to-digital conversions due to the super-steep switching characteristics of the PF neuron device, substantially reducing the area overhead of NC block. Our NC block shows high energy efficiency (37.9 TOPS/W) with high accuracy for CIFAR-10 image classification (91.80%), outperforming prior works. This work shows the high engineering potential of integrating synapses and neurons in terms of system efficiency and high performance.
This work proposes positive feedback (PF) device-based synaptic devices for reliable binary neural networks (BNNs). Due to PF operation, the fabricated PF device shows a high on/off current ratio (2.69 [Formula: see text] 107). The PF device has a charge-trap layer by which the turn-on voltage ( Von) of the device can be adjusted by program/erase operations and a long-term memory function is implemented. Also, due to the steep switching characteristics of the PF device, the conductance becomes tolerant to the retention time and the variation in turn-on voltage. Simulations show that high accuracy (88.44% for CIFAR-10 image classification) can be achieved in hardware-based BNNs using PF devices with these properties as synapses.
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