In this letter, a new simple circuitry LED driver with current reduction is proposed, realized and experimentally validated. The proposed circuit comprises with very few components intended for making a costeffective and compact design while still shows a high performance. The circuit reduces non-conducting time of LEDs to enhance power factor (PF) and total harmonic distortion (THD). The flicker can also be relatively reduced. By using current limiter cells, lighting variation is eliminated with respect of the variation of AC input voltage. A worst case of a 4 W with only two LED-strings driver is implemented and tested by using a 1 um 650 V-BCDMOS high voltage process to verify advantageous characteristics of the suggested scheme. Experimental results demonstrate a PF of 0.97 with a THD of 24.62% and an efficiency of 87.1% at a 220 V AC supply.

This letter proposes a novel on-chip step-dimmer using an analog dimming method for a high PF AC-powered LED driver. The full AC LED driver can achieve a very high PF and a low THD by using a self-adaptive power processing circuit while delivering a best-in-class dimming performance with the proposed step-dimmer. Under the control of the dimming signal, the dimming voltage is step-adjusted from 1.0 V to 2.5 V, the average LED current can be changed from 40% to 100% of the nominal LED current value. To verify the feasibility of the proposed scheme, an 8-string 4.4 W AC-powered LED driver with the proposed step-dimmer was designed and simulated using a 0.35 um-700 V BCD Magnachip process. The gained results verify that the proposed step-dimmer can maintain a high performance of the AC LED driver under different dimming modes with a PF and a THD around 0.998 and 6%, respectively.

The effect of pre-activation annealing on the final surface morphology of the Al implanted 4H-SiC has been investigated using atomic force microscopy (AFM). The implanted SiC was annealed in dual steps; the pre-activation annealing which was done at 1100~1500 o C earlier, and the activation one subsequently done at 1600 o C. The implanted SiC showed the well-developed macrosteps after the activation annealing, while the unimplanted ones showed smoother surfaces. The pre-activation annealing at 1400 o C was very effective to reduce the macrostep formation during the activation annealing. The surface damage induced from the ion implantation has been relaxed during the pre-activation annealing, which seemed to suppress the macrostep formation on the surface of SiC.

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4H-SiC pn diodes with field limiting rings(FLRs) were fabricated and characterized. The dependences of reverse breakdown voltage on the number of FLRs, the distance between p-base main junction and first FLR, and activation temperatures, were investigated. Al and B ions were implanted and activated at high temperature to form p-base and p+ region in the n-epilayer, respectively. We have obtained up to 1790V of reverse breakdown voltage in the pn diode with two FLRs on 10µm thick epilayer. The differential on-resistances of the fabricated diode are 5.3mΩcm 2 at 100A/cm 2 and 2.7mΩcm 2 at 1kA/cm 2 , respectively. All pn diodes with FLRs have higher avalanche breakdown voltages than those without an FLR. This study reveals that the FLR edge termination techniques for SiC pn diodes can provide high blocking voltage as well as low on-resistance.