Consecutive multiline addressing (CMLA) has been developed to increase a PMOLED display's lifetime, resolution, and power efficiency. Mathematically, it decomposes an image matrix into a set of multiline matrices and a residual single-line matrix. The decomposition is lossless and implemented by a combinatorial algorithm allowing small chip size for the logic and high processing speed, e.g., for video applications. The additional memory needed for CMLA is just a fraction of the graphic data memory (GDRAM). The printed-circuit-board (PCB) prototype with a field programmable gate array (FPGA) proves that the CMLA produces images of the same visual quality as the conventional single-line addressing (SLA), while the power efficiency is substantially higher.
This paper presents a new addressing scheme for PM OLED displays by using Consecutive Multiline Addressing, which decomposes the image information into multiline matrices and efficiently reduces the driving current amplitude of OLED pixels. As a result, the lifetime and/or resolution of PM OLED displays can substantially be extended.
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