Summary: The driving forces behind the development of flexible electronics are their flexibility, lightweightedness, and potential for low‐cost manufacturing. However, because of physical limitations, traditional thermal processes cause deformations in the flexible substrate. As a result, the adhesion quality of the printed wires is deteriorated. This article reviews recent developments in printing circuits on a flexible substrate by combining self‐assembled polyelectrolytes, ink‐jet printing of a catalyst, and electroless plating of metals. The limitations and potential applications of this technology are also discussed. Experiments implementing this technology demonstrated significant results. By a vibration‐induced assistance during an ink‐jet printing catalyst process, line width and blurring can be controlled to within ±3% variation. Following the IPC 6013 standard for flexible electronics, the results after thermal cycling (288 °C, 6 times) and a hot oil test (260 °C, 3 times) indicated that the metallic circuit had retained excellent adhesion properties and electric characteristics. We also report the first successful demonstration of a metal film in a via‐hole inner wall on a flexible substrate. This novel fabrication method is ideal for the realization of large area, flexible electronics and future multilayer flexible substrate application, such as flexible display, chip on flexible substrate, etc., particularly where traditional lithographic processes can not be applied.Flexible high‐density circuit on an FR‐4 substrate (left) and picture of via hole with copper inner wall (right).magnified imageFlexible high‐density circuit on an FR‐4 substrate (left) and picture of via hole with copper inner wall (right).
This article describes a method of forming a stacked hybrid metal structure and pattern to enhance radio-frequency identification antenna coil inductance. The essential strategies included the use of multilayer self-assembled polyelectrolytes to modify the surface property of substrates, an ink jet printing process for a Pd containing catalyst, and a stacked hybrid metal layer formed by electroless plating in subsequent processes. The results demonstrate that the minimum line width and line spacing can reach 100 m/100 m, and electrical performance is compared to prior research in employing different approaches. The method presented in this article enhances the capability by adapting to any substrate surface using the self-assembled polyelectrolyte technique. Therefore, results were verified on different substrates, such as PI, PET, and FR-4; satisfactory electric performance for application was obtained. In detail, the inductance of the antenna improved from 300 nH to 20 H for a monolayer coil, and 600 nH to 50 H for a double layer coil, depending on the metal thickness.
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