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A PbTiO3 ferroelectric film 813 Å thick was grown on a CeO2/Si(100) substrate by the digital chemical vapor deposition method. As the buffer layer between the perovskite PbTiO3 film and Si substrate, a CeO2 intermediate layer was grown on the Si(100) substrate using an ultrahigh vacuum (UHV) system. The density of surface states at the CeO2/Si(100) interface was estimated from the capacitance-vs-voltage (C-V) characteristics of Al/CeO2/Si(100) samples to be 8×1011/cm2 eV, and CeO2 films on Si(100) are therefore expected to be suitable as gate oxides for metal/ferroelectric/semiconductor-field-effect transistors (FETs). Experimental results derived from the C-V characteristics of metal/ferroelectric/insulator/semiconductor (MFIS)-structured samples show that the MFIS structure has ferroelectric switching properties, as demonstrated by the roughly 2.4 V threshold hysteresis in its C-V characteristics (“memory window”). Furthermore, the retention time of the MFIS sample was estimated to be 100,000 s by measuring the time dependence of capacitance at the voltage at the centuer of the memory window. Interfacial lines of the MFIS structure were clear in a transmission electron microscope image, and an amorphous CeO x layer and an amorphous SiO2 layer were seen between the Si substrate and PbTiO3 film. Secondary ion mass spectroscopy revealed that there was little diffusion of Si atoms into the PbTiO3 layer on the CeO2/Si substrate.

Using reflection high-energy electron diffraction (RHEED), X-ray diffraction (XRD) and X-ray pole figure measurements, we evaluated the crystallinities of yttria-stabilized zirconia (YSZ) thin films as an intermediate layer for metal/ferroelectric/insulator/semiconductor-structure field-effect transistors (MFIS-FETs). A highly oriented YSZ film was grown on a Si(100) substrate by the vacuum evaporation method. The [100] axes of the YSZ crystals were aligned parallel to [100] axes of Si crystals in the plane. In addition, electrical characterizations of the highly oriented YSZ thin films on Si(100) were evaluated from current–voltage ( I–V ) and capacitance–voltage ( C–V ) measurements. The I–V measurement indicated a breakdown field of about 3 MV/cm (at I=1 nA/cm2). The C–V measurement results suggest that mobile ions were present in the YSZ films. Oriented perovskite PbTiO3 films were deposited on YSZ crystal and YSZ/Si(100) substrates by the digital chemical vapor deposition (CVD) method. These PbTiO3 films included many PbTiO3 grains with their [100] axes parallel to the [100] or [110] axis of YSZ crystals in the plane of the PbTiO3/YSZ interface.

Initial stages and growth processes of ceria ( CeO2), yttria-stabilized-zirconia (YSZ) and ceria-zirconia mixture ( Ce·ZrO2) thin films on Si(100) surfaces were studied in conjunction with O2 pressure. We showed that (110)-oriented films of CeO2, YSZ and Ce·ZrO2 grew obeying the arrangements of Si atoms in (2×1) or (1×2) structures on a Si(100) surface under about 5×10-7 Torr O2 gas at about 900° C. On the other hand, under 1×10-5 Torr O2 gas, (111)-oriented CeO2 polycrystal films grew because of formation of Ce2O3 and Si O2 layers at the interface between CeO2 and Si(100). Furthermore, the (100)-epitaxial YSZ and Ce·ZrO2 films grew, reducing the SiO2 layer on Si(100) under 1×10-5 Torr O2 gas. We attempted to explain these processes in terms of standard formation enthalpies of CeO2, Ce2O3, ZrO2 and SiO2.

We report on the fabrication of an n-channel metal/ferroelectric/insulator/semiconductor (MFIS)-Field Effect Transistor (FET) using Al/SrBi2Ta2O9/CeO2/Si(100) structures and its characterization, as well as on the preparation of SrBi2Ta2O9 ferroelectric films at low temperatures. SrBi2Ta2O9 ferroelectric films fabricated at about 650° C on a Pt/SiO2/Si substrate had a remanent polarization (P r) of 7.8 µ C/cm2. The drain current-gate voltage (I D-V G) characteristics of MFIS-FET using the Al/SrBi2Ta2O9/CeO2/Si(100) structure showed threshold hysteresis due to the ferroelectric properties of the SrBi2Ta2O9 film. Nonvolatile memory operations of the MFIS-FET were demonstrated by observing its drain current (I D) which was controlled by previously applied write voltages.

We fabricated a metal/ferroelectric/insulator/semiconductor (MFIS) structure using SrBi2Ta2O9 (SBT) as the ferroelectric material for the first time. The SBT thin film on CeO2/Si (100) had (105), (110) and (200) orientation. Threshold hysteresis (called “memory window”) was observed in the capacitance-voltage ( C–V ) characteristics of this sample. The memory window was about 0.5 V. From the calculation of the C–V characteristics, it is estimated that the density of surface states at the CeO2/Si interface increases upon deposition of SBT. By X-ray diffraction (XRD) analysis, diffusion of Si to the surface of SBT was detected. In order to prevent such diffusion it may be necessary to reduce the firing temperature.

We evaluated the crystallinities of Ce X Zr1- X O2 (X=0.10–0.20) thin films used as intermediate layer for metal/ferroelectric/insulator/semiconductor field effect transistors (MFIS-FETs), using reflection high-energy electron diffraction (RHEED), X-ray diffraction (XRD) and X-ray pole figure measurement. The crystal alignments of Ce X Zr1- X O2 films on Si(100) were Ce X Zr1- X O2[100]//Si[100] or Ce X Zr1- X O2[100]//Si[001], in the plane. The breakdown field of Ce X Zr1- X O2 was about 3 MV/cm (at I=1 nA/cm2). From C-V measurements, it was found that the electrical properties of the intermediate layers of the MFIS-FETs were good. Oriented perovskite PbTiO3 films were deposited on Ce X Zr1- X O2/Si(100) substrates by digital chemical vapor deposition (CVD). These PbTiO3 films included many PbTiO3 grains aligned with the [100] or [001] axis parallel to the [101] axis of the Ce X Zr1- X O2 crystals at the plane in the PbTiO3/Ce X Zr1- X O2 interface. From C-V measurements of an Al/PbTiO3/Ce X Zr1- X O2/Si(100) sample, we obtained a threshold hysteresis (memory window) of about 1.4 V.

A SrBi2Ta2O9 (SBT) thin film was prepared on a CeO2/Si(100) substrate at a process temperature of 700° C. In the X-ray photoelectron spectroscopy (XPS) analysis, no diffusion of Si, which had been observed in the 800° C process sample, was detected in this 700° C process sample. In the capacitance-voltage (C-V) measurement, the width of the threshold hysteresis (“memory window”) was observed to be 1.0 V. In the curve fitting of the C-V characteristics, the measured characteristics fit the calculated characteristics fairly well. It is considered that this fairly good fit is due to prevention of the diffusion of Si and SBT elements caused by reducing the process temperature for preparing the SBT thin film.