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Summary This paper presents the hardware realization and performance study of fractional inductors of order 0 < α < 2. The fractional inductors used in this work have been realized with the help of general impedance converter circuit and fractional capacitors. Impedance characterization of fractional inductors with different exponents has been carried out experimentally. Also a generalized approach to design a fractional‐order bandpass filter is discussed in this work. The fractional‐order bandpass filter consists of a series combination of a resistor, a fractional inductor of order 1 < α < 2, and a fractional capacitor of order 0 < β < 1. The performance of fractional‐order bandpass filters has been studied and compared with corresponding integer‐order filters through both experimentation and simulation. Copyright © 2014 John Wiley & Sons, Ltd.

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Here, we propose the fabrication of a solid state fractional capacitor for which constant phase (CP) angles were attained in different frequency zones: 110 Hz–1.1 kHz, 10 kHz–118 kHz, and 230 kHz–20 MHz. The configuration makes use of epoxy resin as the matrix in which multi-walled carbon nanotubes (MWCNTs) are dispersed. Adhesive nature of the epoxy resin is utilized for binding the electrodes, which avoids the extra step for packaging. The fractional capacitive behavior is contributed by the distribution of time constants for the electron to travel from one electrode to the other. The distributive nature of the time constant is ensured by inserting a middle plate which is coated with a porous film of polymethyl-methacrylate in between the two electrodes. The phase angle trend for the configuration is studied in detail, and it is observed that as the % of carbon nanotubes (CNTs) loading increases, the CP angle increases from −85° to −45° in the frequency zones above 100 Hz. The developed device is compact and it can be easily integrated with the electronic circuits.

Summary The present work reports the realization of an analog fractional‐order phase‐locked loop (FPLL) using a fractional capacitor. The expressions for bandwidth, capture range, and lock range of the FPLL have been derived analytically and then compared with the experimental observations using LM565 IC. It has been observed that bandwidth and capture range can be extended by using FPLL. It has also been found that FPLL can provide faster response and lower phase error at the time of switching compared to its integer‐order counterpart. Copyright © 2014 John Wiley & Sons, Ltd.

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