Summary This paper presents the hardware realization and performance study of fractional inductors of order 0 < α < 2. The fractional inductors used in this work have been realized with the help of general impedance converter circuit and fractional capacitors. Impedance characterization of fractional inductors with different exponents has been carried out experimentally. Also a generalized approach to design a fractional‐order bandpass filter is discussed in this work. The fractional‐order bandpass filter consists of a series combination of a resistor, a fractional inductor of order 1 < α < 2, and a fractional capacitor of order 0 < β < 1. The performance of fractional‐order bandpass filters has been studied and compared with corresponding integer‐order filters through both experimentation and simulation. Copyright © 2014 John Wiley & Sons, Ltd.

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Summary The present work reports the realization of an analog fractional‐order phase‐locked loop (FPLL) using a fractional capacitor. The expressions for bandwidth, capture range, and lock range of the FPLL have been derived analytically and then compared with the experimental observations using LM565 IC. It has been observed that bandwidth and capture range can be extended by using FPLL. It has also been found that FPLL can provide faster response and lower phase error at the time of switching compared to its integer‐order counterpart. Copyright © 2014 John Wiley & Sons, Ltd.

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