In this manuscript, recent progress in the area of resistive random access memory (RRAM) technology which is considered one of the most standout emerging memory technologies owing to its high speed, low cost, enhanced storage density, potential applications in various fields, and excellent scalability is comprehensively reviewed. First, a brief overview of the field of emerging memory technologies is provided. The material properties, resistance switching mechanism, and electrical characteristics of RRAM are discussed. Also, various issues such as endurance, retention, uniformity, and the effect of operating temperature and random telegraph noise (RTN) are elaborated. A discussion on multilevel cell (MLC) storage capability of RRAM, which is attractive for achieving increased storage density and low cost is presented. Different operation schemes to achieve reliable MLC operation along with their physical mechanisms have been provided. In addition, an elaborate description of switching methodologies and current voltage relationships for various popular RRAM models is covered in this work. The prospective applications of RRAM to various fields such as security, neuromorphic computing, and non-volatile logic systems are addressed briefly. The present review article concludes with the discussion on the challenges and future prospects of the RRAM.

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During the last decade, there has been considerable interest of researchers towards the use of two-dimensional (2D) materials for the electronic device implementations. The main driving force is the improved performance offered by these 2D materials for electronic device operation in nano-scale regime. Among these 2D material, silicene (the 2D of silicon) has emerged as preferred choice because of its expected integration with silicon based technology. This expected integration of silicene with silicon technology is one of the primary advantages of silicene as a material for future electronic devices with the availability of infrastructure of bulk silicon for its processing. Silicene in its basic form is a conductor due to the zero bandgap formation and therefore several techniques have been given in the open literature for forming the band gap in silicene. Besides, silicene has been used to design several electronic devices ranging from transistors to photodetectors. In this paper, a review of silicene is presented considering a) the features/properties offered by it, b) the methods employed for the generation of its bandgap, c) different types of field effect transistors (FETs) reported on silicene, and d) spintronic applications of silicene.

The capability of multiple valued logic (MVL) circuits to achieve higher storage density when compared to that of existing binary circuits is highly impressive. Recently, MVL circuits have attracted significant attention for the design of digital systems. Carbon nanotube field effect transistors (CNTFETs) have shown great promise for design of MVL based circuits, due to the fact that the scalable threshold voltage of CNTFETs can be utilized easily for the multiple voltage designs. In addition, resistive random access memory (RRAM) is also a feasible option for the design of MVL circuits, owing to its multilevel cell capability that enables the storage of multiple resistance states within a single cell. In this manuscript, a design approach for ternary combinational logic circuits while using CNTFETs and RRAM is presented. The designs of ternary half adder, ternary half subtractor, ternary full adder, and ternary full subtractor are evaluated while using Synopsis HSPICE simulation software with standard 32 nm CNTFET technology under different operating conditions, including different supply voltages, output load variation, and different operating temperatures. Finally, the proposed designs are compared with the state-of-the-art ternary designs. Based on the obtained simulation results, the proposed designs show a significant reduction in the transistor count, decreased cell area, and lower power consumption. In addition, due to the participation of RRAM, the proposed designs have advantages in terms of non-volatility.

In this paper, the design of ternary logic gates (standard ternary inverter, ternary NAND, ternary NOR) based on carbon nanotube field effect transistor (CNTFET) and resistive random access memory (RRAM) is proposed. Ternary logic has emerged as a very promising alternative to the existing binary logic systems owing to its energy efficiency, operating speed, information density and reduced circuit overheads such as interconnects and chip area. The proposed design employs active load RRAM and CNTFET instead of large resistors to implement ternary logic gates. The proposed ternary logic gates are then utilised to carry out basic arithmetic functions and is extendable to implement additional complex functions. The proposed ternary gates show significant advantages in terms of component count, chip area, power consumption, energy consumption and dense fabrication. The results demonstrate the advantage of the proposed models with a reduction of 50% in transistor count for the STI, TNAND and TNOR logic gates. For THA and THS arithmetic modules 65.11% reduction in transistor count is observed while for TM design, around 38% reduction is observed. In this work, we aim to demonstrate the viability of RRAM in the design of ternary logic systems, thus the focus is mainly on obtaining the proper functionality of the proposed design. Also the proposed logic gates show a very small variation in power consumption and energy consumption with variation in process parameters, temperature, output load, supply voltage and operating frequency. For simulations, HSPICE tool is used to verify the authenticity of the proposed designs. The ternary half adder, ternary half subtractor and ternary multiplier circuits are then implemented utilising the proposed gates and validated through simulations. INDEX TERMS Multiple valued logic (MVL), ternary logic systems, emerging technologies, carbon nanotube field effect transistor (CNTFET), resistive random access memory (RRAM).

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Industrialization has led to a huge demand for a network control system to monitor and control multi-loop processes with high effectiveness. Due to these advancements, new industrial wireless sensor network (IWSN) standards such as ZigBee, WirelessHART, ISA 100.11a wireless, and Wireless network for Industrial Automation-Process Automation (WIA-PA) have begun to emerge based on their wired conventional structure with additional developments. This advancement improved flexibility, scalability, needed fewer cables, reduced the network installation and commissioning time, increased productivity, and reduced maintenance costs compared to wired networks. On the other hand, using IWSNs for process control comes with the critical challenge of handling stochastic network delays, packet drop, and external noises which are capable of degrading the controller performance. Thus, this paper presents a detailed study focusing only on the adoption of WirelessHART in simulations and real-time applications for industrial process monitoring and control with its crucial challenges and design requirements.

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