A novel process for electrochemical atomic layer deposition (e-ALD) of copper is presented. In this process, a sacrificial monolayer of zinc (Zn) is formed via underpotential deposition (UPD) on a copper (Cu) or ruthenium (Ru) substrate. The sacrificial Zn monolayer then undergoes surface-limited redox replacement (SLRR) by nobler Cu. This provides a monolayer of Cu on the substrate surface. UPD-SLRR cycles are repeated to build multi-layers of Cu with controlled thickness while minimizing surface roughness. The proposed Cu e-ALD process is attractive from the point of view of scalability and commercial viability for the following reasons: (i) it eliminates the use of lead-containing chemistries used in previous formulations of Cu e-ALD; (ii) it utilizes a single alkaline (pH = 11.2) electrolyte, which minimizes parasitic reactions such as hydrogen co-evolution and eliminates the need for frequent electrolyte switching as needed in previous e-ALD processes. In this publication, we report cyclic voltammetry, electrochemical quartz crystal microgravimetry, and anodic stripping coulometry studies to gain insights into the process efficiency and deposit morphology characteristics of the Cu e-ALD process.

Electrochemical atomic layer deposition (e-ALD) process for fabricating cobalt (Co) nano-films is reported. The e-ALD process employs a two-step approach in which underpotential deposition (UPD) is first used to form a sacrificial adlayer of zinc (Zn) on a ruthenium (Ru) substrate. The sacrificial Zn adlayer then undergoes spontaneous surface-limited redox replacement (SLRR) by nobler Co. This provides an atomic layer of Co on the substrate surface. The two-step process is repeated cyclically to build multilayers of Co. The unique feature of the e-ALD approach presented herein is that it utilizes Zn as the sacrificial adlayer instead of Pb or Cu used conventionally in the e-ALD sequence of noble metals. The use of sacrificial Zn uniquely renders its redox replacement by Co to be thermodynamically favorable, thereby enabling Co e-ALD. In the present report, we discuss the electrochemical characteristics of the UPD and SLRR process steps, the e-ALD deposition rate and the deposit surface roughness. The Co deposits formed via e-ALD do not exhibit roughness amplification during the first 10 cycles of e-ALD, which is indicative of atomic-scale layer-by-layer growth of Co on the underlying Ru substrate. High-performance integrated circuits utilize nano-scale, currentcarrying copper (Cu) interconnects. In accordance with the Moore's law, 1 miniaturized interconnects are required in modern devices to obtain superior device performance. The continued shrinkage in the size (cross-sectional area) of each interconnect leads to an increase in its electrical resistance. This detrimentally impacts the electrical performance of the integrated circuit.2 Furthermore, aggressive interconnect size scaling below the 10 nm node poses challenges to void-free interconnect fabrication. State-of-the-art interconnects are fabricated of Cu metal due to its low electrical resistivity and superior electromigration resistance.3 The interconnect signal delay (τ) is given by τ = RC, where R is the interconnect resistance and C is the capacitance of the surrounding inter-layer dielectric. The interconnect resistance R increases dramatically for Cu interconnect dimensions below 40 nm due to the substantial increase in the electrical resistivity of Cu at such narrow dimensions. The resistivity increase is typically attributed to electron scattering processes at grain boundaries and at interfaces within the Cu interconnect structure. Such scattering processes become dominant when the interconnect dimension approaches the electron mean free path (EMFP = 39 nm at room temperature) in Cu.4,5 As a consequence, the interconnect signal delay increases. To overcome this critical issue, an interconnect material which exhibits lower electrical resistivity at narrow (sub 10 nm) dimensions is required. Cobalt (Co) is considered as a promising alternative interconnect material to replace the conventionally used Cu.6,7 At narrow dimensions, i.e., below 10 nm, Co exhibits comparable or lower electrical resistivity compared to Cu, largely attributed to the lower ...

A novel process for the electrochemical atomic layer etching (e-ALE) of copper (Cu) is presented. In this process, Cu first undergoes surface-limited sulfidization to form a monolayer of copper sulfide (Cu 2 S). The Cu 2 S layer is then selectively etched in hydrochloric acid without etching the underlying Cu. The steps of surface-limited sulfidization of Cu and selective etching of the resulting Cu 2 S are repeated sequentially to achieve a net etch rate of close to one Cu monolayer etched per e-ALE cycle. Surface-limited etching is shown to minimize roughness amplification thereby preserving the near-atomic flatness of the original Cu electrode. Atomic layer etching (ALE) processes are critically important for the precise tailoring of materials and structures in nano-electronics. 1For atomically precise etching of metals, plasma-based approaches are available which generate nonvolatile etch products thereby contaminating the metal surface. Hess and co-workers have developed a two-step process that etches copper (Cu) films with chlorine and hydrogen plasmas at low temperature (below 20• C). This process generates a volatile etch product that minimizes surface contamination. 2In most plasma-based approaches, the metal etching rate is higher than 1 nm per etch cycle. Such high etch rates do not provide the requisite atomic-scale control over etching required in ALE. While plasma-assisted ALE processes for oxides are mature, 1 ALE of metals is still in its infancy and numerous development efforts are currently underway. 3In this communication, we report on an electrochemical approach for the layer-by-layer etching of Cu with atom-scale control over the etching rate. The two-step approach consists of surface-limited electrochemical sulfidization of Cu followed by selective etching of the resulting copper sulfide (Cu 2 S) monolayer. Surface-limited sulfidization has been used previously for fabricating semiconductors. 4 Feasibility of the electrochemical ALE of Cu is demonstrated and process performance parameters (etch rate, surface roughness) are characterized. ExperimentalCyclic voltammetry and chronoamperometry.-Surface-limited sulfidization of Cu was studied using cyclic voltammetry (CV) performed using a three-electrode cell consisting of a sputter-deposited Cu substrate as the working electrode, a platinum (Pt) wire as the counter electrode, and a saturated Ag/AgCl reference electrode (Fisher Scientific). The electrolyte contained 0.1 M potassium hydroxide (KOH, Fisher Chemical) and 0.5 mM sodium sulfide (Na 2 S, SigmaAldrich) and was prepared using de-aerated DI water. A VersaSTAT 3 potentiostat was used for all electroanalytical measurements. All potentials reported below are referenced to the standard hydrogen electrode (SHE). The Cu substrate was rinsed first with ethanol and then with DI water before drying with N 2 . The cleaned substrate was immersed in 2 M sulfuric acid (H 2 SO 4 , Fisher Scientific) for 1 min to remove surface Cu oxides. A potential of -1.2 V vs. SHE was applied for 100 s to further ...

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