Modulation-doped In0.5Ga0.5As/In0.5Al0.5As quantum well structures grown by molecular beam epitaxy on GaAs substrates using a relaxed AlGaAsSb buffer showed carrier mobilities of 8500 cm2/V s for a sheet concentration of 3.5×1012 cm−2 at room temperature. The crystallinity of the quaternary buffer layer was verified by x-ray diffractometry. Transistors with 0.25×100 μm2 gates demonstrated transconductance values as high as 800 mS/mm. S-parameter measurements revealed a cutoff frequency fT of 87 GHz and a maximum oscillation frequency fMAX of 140 GHz (both extrinsic values).
In this work we present a thorough investigation of charge retention in memory cells with SiO 2 /Al 2 O 3 interpoly dielectric (IPD) stacks, using a fully planar stacked gate memory cell with self-aligned floating gate. This structure is interesting for future area scaling and allows high-k materials and metal gates to be easily introduced. It is shown that the retention behaviour is determined by room temperature charge loss and directly correlated to the properties of the IPD layer. From a comparison between different thicknesses, gate materials and post-deposition anneals (PDA) of the Al 2 O 3 layer, it is also found that the bottom oxide thickness is the key parameter for retention, while the use of a poly gate and a low PDA temperature yield further improvement.
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