Abstract-The effect of substrate RF losses on the characteristics of silicon-based integrated transformers is studied experimentally by using a substrate transfer technique. The maximum available gain is used to evaluate the quality of transformers similarly to that of active devices. The silicon substrate has a pronounced effect on the quality factor and mutual resistive coupling factor of the primary and secondary coils, thereby degrading the maximum available gain of the transformer. A highly structured patterned ground shield is shown to improve the maximum available gain of a transformer at high frequencies, while at low frequencies, it has little effect on the maximum available gain and even degrades the quality factors of the transformer coils. It is shown that the low-frequency degradation of the coil quality factors relates to local eddy currents in the patterned metal shield.Index Terms-Eddy-current losses, etching, ground shield, integrated transformer, maximum available gain, mutual coupling, periodic ground pattern, quality factor, substrate effect, substrate transfer.

A bulk-micromachining post-process module, based on twolevel structuring of RF silicon substrates and a 4 -p thick one-level sub-surface metal pattern, is presented. This allows for fabricating three-dimensional structures for novel RF components and has potential in more compact integration. Next to a concise description of the relevant aspects of the fabrication process, mechanical stability of the postprocessed wafers is analyzed. Sub-surface spiral inductors with good quality and low coupling to inductors built at the wafer surface are presented, thus demonstrating the feasibility of three-dimensional integration of RF components.

This paper presents a novel two-level silicon bulk micromachining for integration of RF (radio frequency) devices. The RF devices are fabricated at the frontside of Si (100) wafers using conventional IC technology. A post-processing module is applied from the wafer backside. This module provides a blanket ground plane at an optimum position beneath the wafer surface, a front-side contact from the wafer surface to that ground plane and trenches to suppress cross talk through the conductive silicon. Moreover, due to the front-side RF ground contact, compatibility to conventional packaging is maintained. The feasibility of the new postprocess module is demonstrated through the fabrication of microstrip transmission lines and conductor-backed spiral inductors.

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