2D semiconductors, such as transition metal dichalcogenides (TMDs) show a rare combination of physical properties that include a large‐enough bandgap to ensure sufficient current modulation in transistors, matching electron and hole mobility for complimentary logic operation, and sufficient mechanical flexibility of the nanosheets. Moreover, the solvent‐exfoliated TMD‐nanosheets may also be processed at low temperatures and onto a wide variety of substrates. However, the poor inter‐flake transport in solution‐cast 2D‐TMD network transistors hinders the realization of high device mobility and current modulations that the intraflake transistors can regularly demonstrate. In this regard, fully printed and electrolyte‐gated, narrow‐channel MoS2 field‐effect transistors (FETs) with simultaneous high current saturation (>310 µA µm−1) and on–off ratio (>106) are proposed here. The transport limitation is overcome by printing an additional metal layer onto the 2D‐TMD nanosheet channel, which substantially shortens the effective channel lengths and results in predominant intraflake transport. In addition, a channel‐capacitance‐modulation induced subthermionic transport is recorded, which leads to a subthreshold slope value as low as 7.5 mV dec−1. On the other hand, thermionic MOSFETs and fully printed depletion‐mode NMOS inverters are also presented. The demonstrated generic approach involving chemically exfoliated nanosheet inks and the absolute device yield indicates the feasibility of fully printed 2D‐TMD electronics.
The major limitations of solution‐processed oxide electronics include high process temperatures and the absence of necessary strain tolerance that would be essential for flexible electronic applications. Here, a combination of low temperature (<100 °C) curable indium oxide nanoparticle ink and a conductive silver nanoink, which are used to fabricate fully‐printed narrow‐channel thin film transistors (TFTs) on polyethylene terephthalate (PET) substrates, is proposed. The metal ink is printed onto the In2O3 nanoparticulate channel to narrow the effective channel lengths down to the thickness of the In2O3 layer and thereby obtain near‐vertical transport across the semiconductor layer. The TFTs thus prepared show On/Off ratio ≈106 and simultaneous maximum current density of 172 µA µm−1. Next, the depletion‐load inverters fabricated on PET substrates demonstrate signal gain >200 and operation frequency >300 kHz at low operation voltage of VDD = 2 V. In addition, the near‐vertical transport across the semiconductor layer is found to be largely strain tolerant with insignificant change in the TFT and inverter performance observed under bending fatigue tests performed down to a bending radius of 1.5 mm, which translates to a strain value of 5%. The devices are also found to be robust against atmospheric exposure when remeasured after a month.
Here, the first term, V GS S ψ ∂ ∂ , known as the "body factor", cannot be less than 1 for standard MOSFET electrostatics, and the second term log I ( ) S 10 D ψ ∂ ∂ that is equals ln(10) β K T q and is 60 mV dec −1 at room temperature, determines the minimum limit of the subthreshold swing for the thermionic emission over the Boltzmann barrier. This in turn defines the steepness/slope of the transfer curves, the signal gain and the dynamic power dissipation of the electronic switches. One way to circumvent this limit is to allow tunneling through the barrier; in this case band-to-band-tunneling (BTBT) would be required as single career tunneling cannot lead to subthermionic transport. [2] However, the BTBT field-effect transistors (FETs) typically show low Oncurrents; while there are large number of subthermionic tunnel FETs reported in the literature, [3][4][5][6][7][8][9][10][11][12][13] the recent ones based on 2D dichalcogenides demonstrate particularly high performance. [2,14,15] An alternative approach to achieve subthermionic transport, originally proposed by Salahuddin and Datta [16] and later experimentally demonstrated by various research groups, [16][17][18][19][20][21][22][23][24][25][26][27] deals with concept that can actually reduce the body factor to values less than 1. This involves stabilizing a negative capacitance regime by placing a ferroelectric and dielectric layer in series to comprise the MOS capacitor. In this case, the Boltzmann activation barrier remains intact; however, an artificial voltage amplifier or step-up transformer is created using the sharp switching of the dipoles (i.e., exploiting the square-shaped P-E loop) of the ferroelectric and thereby a faster change in Ψ S (surface potential) becomes possible, as compared to the applied ∂V GS . However, in either of these approaches, specific requirements in terms of semiconductors (e.g., single sheet of 2D material), dielectrics or interfaces (e.g., ferroelectric/dielectric interface in case of negative capacitance (NC)-gate FETs) are there, which are certainly nontrivial to be replicated, when the complete device is to be solution processed/printed. Consequently, subthermionic transport Subthreshold slope of field-effect transistors (FETs) less than the fundamental Boltzmann limit (60 mV dec −1 at 300 K) is demonstrated either using band-to-band tunneling or negative capacitance (NC) ferroelectric-gate transistors. However, it is difficult to replicate both of these strategies in solution-processed/printed FETs. Nonetheless, it is shown that the use of a metal-insulator-metal-semiconductor architecture alongside electrolyte gating can simultaneously create highly reproducible static negative capacitance behavior in printed FETs, resulting in subthermionic transport for over four decades of drain currents with a subthreshold slope as low as 16 mV dec −1 , and thereafter a strong thermionic transport regime, characterized by an unprecedented On-current of 195 µA µm −1 , a transconductance of 215 µS µm, and a metal-like On-state res...
High energy density, flexible supercapacitors typically use various carbon allotropes and 2-dimensional metals as the electrode material. As an alternative, here we report, fully printed, bendable and high-capacity micro-supercapacitors (MSCs)...
Oxide electronics has received increasing research and industrial attention in recent years. Solution‐processed/printed thin film transistors (TFTs) have rapidly matured to challenge its organic counterparts. However, when the n‐type oxides can demonstrate high mobility band transport, the performance of the p‐type ones is still weak. Consequently, examples of all‐oxide circuits are rare in the literature. Here printed amorphous indium‐gallium‐zinc oxide (a‐IGZO) based all‐oxide pseudo‐CMOS inverters, ring oscillators, and static random access memories (SRAMs), where the doping density and the device aspect ratio‐controlled deep‐subthreshold region offers sharp switching of the input signal is shown. For example, the signal gain (η) of pseudo‐CMOS 2T and 4T inverters is recorded as 285 and 329, respectively. Furthermore, the deep subthreshold operation ensures low dynamic power consumption, only few tens of nanowatts up to 1.5 V supply voltage. The inverters have demonstrated rail‐to‐rail swing up to 30 kHz and the 3‐stage ring oscillators recorded oscillation frequency of 6.7 kHz. The SRAM devices have shown satisfactory noise margins at HOLD‐, READ‐, and WRITE‐states, while their transient response is also recorded. These fully‐printed all‐oxide TFTs and circuits can be of large interest in portable/wearable electronics, display backplanes, interfacing circuits for sensors, etc.
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