Two types of solar cells are successfully grown on chips from two CMOS generations. The efficiency of amorphous-silicon (a-Si) solar cells reaches 5.2%, copperindium-gallium-selenide (CIGS) cells 7.1%. CMOS functionality is unaffected. The main integration issues: adhesion, surface topography, metal ion contamination, process temperature, and mechanical stress can be resolved while maintaining standard photovoltaic processing.
In the current work, we present a detailed study on the material properties of the CIGS layers, fabricated on top of the CMOS chips, and compare the results with the fabrication on standard glass substrates. Almost identical elemental composition on both glass and CMOS chips (within measurement error). From X-ray diffraction measurement, except two peaks from the Si <100> substrate, the diffraction peaks from CIGS solar cell CMOS chip and that on glass substrate coincide for all three temperatures. Helium ion microscope images of the cross-section and top view of the CIGS layers, shows that the grain size is suitable for high efficiency solar cells.
In the past few decades, silicon (Si) complementary metaloxide-semiconductor (CMOS) field-effect transistors have been scaled exponentially over time for the demand of drive current enhancement and cost reduction. As the technology node advances into sub-20 nm regimes, Si CMOS encounters immense challenges from both processing and theoretical perspectives. To maintain or further improve the transistor performance, Ge-based electronic transistors are explored as Ge exhibits higher hole and electron mobilities. As compared with the Si CMOS process, the process for fabricating high performance Ge-based transistors is still under development. This special issue aims to address some of the challenges encountered in the state-of-the-art technology, for both the Si-and Ge-based electronic transistors.For Ge MOSFETs, interface engineering and gate dielectric engineering are necessary to reduce the electrical active defects in the Ge surface and the high-/Ge interface. Other than Ge, SiGe is another possible channel material for the future CMOS technology. SiGe could be obtained by directly growing on Si substrate and therefore it has better compatibility with Si CMOS technologies. Besides the research works on Ge-based transistors, this special issue also includes some papers on the Si lateral diffused MOS (LDMOS). Novel structural designs were demonstrated to improve the performance and reliability of the Si LDMOS. Last but not least, this issue also reports a work on increasing the responsivity of the Si n-MOSFET photodetectors.We hope that readers of this special issue will find not only the accurate and most updated data in the papers, but also important solutions for the existing issues in the theory and fabrication of Si-and Ge-based electronic transistors.
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