Abstract-A digital random return-to-zero technique is presented to improve the dynamic performance of current-steering digital-to-analog converters (DACs). To demonstrate the proposed technique, a CMOS 8-bit 1.6-GS/s DAC was fabricated in a 90-nm CMOS technology. The DAC achieves a spurious-free dynamic range better than 60 dB for a sine-wave input up to 460 MHz and better than 55 dB up to 800 MHz. The DAC consumes 90 mW of power.Index Terms-Current steering, digital-to-analog converter (DAC), digital random return-to-zero (DRRZ), return-tozero (RZ).
New MOS charge pumps utilizing the charge transfer switches (CTS's) to direct charge flow and generate boosted output voltage are described. Using the internal boosted voltage to backward control the CTS of a previous stage yields charge pumps that are suitable for low-voltage operation. Applying dynamic control to the CTS's can eliminate the reverse charge sharing phenomenon and further improve the voltage pumping gain. The limitation imposed by the diode-configured output stage can be mitigated by pumping it with a clock of enhanced voltage amplitude. Using the new circuit techniques, a 1.2-V-to-3.5-V charge pump and a 2-V-to-16-V charge pump are demonstrated.
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