A functional GaAs enhancement/ depletion (E/D) 1 K-bit SRAM and other digital circuits have been fabricated in a GaAs layer grown by MBE on a silicon substrate. These are the most complex digital circuits reported t o date for GaAs-on-Si material. The device performance is compared with the bulk GaAs devices fabricated concurrently using identical processes. The average transconductances of enhancement and depletion FETs are found to be approximately 80% of those for bulk GaAs devices. A threshold voltage standard deviation as small as 27 mV across a t w o inch wafer has been realized. The GaAs-on-Si 1 K-bit SRAM has row address access times ranging from 6 t o 14 nsec which compares favorably t o 4 t o 12 nsec for the same SRAMs in bulk GaAs slices.
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