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A novel circuit design for separating single-event transients due to N-hits and P-hits is described. Measurement results obtained from a 65 nm technology using heavy-ions show different dominant mechanisms for charge collection for P-hits and N-hits. The data collected represent the first such separation of SET pulse widths for 65 nm bulk CMOS technology. For low LET particles, N-hit transients are longer, but for high LET particles, P-hit transients are longer. N-well depth and the parasitic bipolar effect are shown to be the most important parameters affecting transient pulse widths.Index Terms-N-hits, P-hits, pulse width, SET, single event transient, soft error.