The effects of impurities, Mn or Al, on interface and grain boundary electromigration (EM) in Cu damascene lines were investigated. The addition of Mn or Al solute caused a reduction in diffusivity at the Cu/dielectric cap interface and the EM activation energies for both Cu-alloys were found to increase by about 0.2 eV as compared to pure Cu. Mn mitigated and Al enhanced Cu grain boundary diffusion; however, no significant mitigation in Cu grain boundary diffusion was observed in low Mn concentration samples. The activation energies for Cu grain boundary diffusion were found to be 0.74 ± 0.05 eV and 0.77 ± 0.05 eV for 1.5 μm wide polycrystalline lines with pure Cu and Cu (0.5 at. % Mn) seeds, respectively. The effective charge number in Cu grain boundaries Z*GB was estimated from drift velocity and was found to be about −0.4. A significant enhancement in EM lifetimes for Cu(Al) or low Mn concentration bamboo-polycrystalline and near-bamboo grain structures was observed but not for polycrystalline-only alloy lines. These results indicated that the existence of bamboo grains in bamboo-polycrystalline lines played a critical role in slowing down the EM-induced void growth rate. The bamboo grains act as Cu diffusion blocking boundaries for grain boundary mass flow, thus generating a mechanical stress-induced back flow counterbalancing the EM force, which is the equality known as the “Blech short length effect.”
A 32 nm BEOL with PVD CuMn seedlayer and conventional PVD-TaN/Ta liner was fully characterized by fundamental, integrated, and reliability methods. CuMn was confirmed to have fundamental advantages over CuAl, such as higher electromigration (EM) reliability for the same Cu line resistance (R). Both low R and high reliability (EM, SM, and TDDB) were achieved. Improved extendibility of CuMn relative to CuAl was also supported by studies of alloy interactions with advanced liner materials Ru and Co, and by enhancement of ultra-thin TaN barrier performance.
A novel Cu reflow seed process which utilizes physical vapor deposition (PVD) technology components has been demonstrated for nanoscale dual damascene interconnects. Prior to Cu electroplating, small features can be partially filled with Cu by this newly developed Cu reflow seed process. It is confirmed that both suitable seed coverage and appropriate reflow temperature are required for achieving ideal reflow property. Bias conditions during Cu PVD dominate seed coverage in features, and processes at moderate bias are demonstrated to provide optimum bottom and sidewall coverage, while limiting field coverage. Overall Cu fill performance was enhanced significantly and more than a 60% improvement in via-chain yield is obtained by Cu reflow seed compared to conventional seed. Furthermore, Cu lines with fewer voids and less impurities are fabricated by repeating this Cu reflow seed process several times to obtain complete feature fill, which results in lower leakage current between lines. This Cu reflow seed process is a promising candidate for improving Cu fill performance for nanoscale Cu/low-k interconnects of 32 nm critical dimension and beyond.
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