An examination of the interface between Cr and cured polyimide (PI) was carried out using x‐ray photoelectron spectroscopy and transmission electron microscopy. The results indicate that, after curing, the interface remains sharp and planar, at least on a submicron scale, with no discernible material mixing or mechanical interlocking. During Cr metallization of cured polyimide (PI) at room temperature, the first few monolayers of Cr appear to react with the pendent oxygen in the PI substrate. This layer of oxidized Cr atoms forms chemical bonds with PI on the one side, and metallic bonds with the subsequent Cr deposit on the other. It is estimated that the interfacial reaction may give rise to an eightfold increase in intrinsic adhesion strength of the Cr/PI system as compared to Cu/PI couples for which no interfacial reaction have been observed.
Interfacial reactions of polyimide with several metals have been investigated by XPS and TEM to determine their effects on adhesion and long term stability. It has been found that the polyimide-on-metal interface and the metal-on-polyimide interface are intrinsically different; in the case of PI-on-metal interface, the precursor of polyimide, polyamic acid, reacts with the metal resulting in a strong chemical bond and therefore, higher adhesion strength than the corresponding metal-on-PI interface. Both interfaces are found susceptible to T/H environment, resulting in significant adhesion loss. The mechanical and electrical properties of polyimide may be altered as a result of the interaction with metals and therefore, great care is necessary to insure a stable interface and the reliability of devices.
IntroductionWhile FinFET transistors are the most promising candidates to extend scaling of planar silicon devices, limitations in process technology make it difficult to obtain an uniform thickness across the height of a fin [1]. The actual fins typically have trapezoidal structures with non-vertical sidewalls [2], which causes significant short-channel effects, and degradation and variation in the device characteristics. In this work, we present the first analytical approach and formulations to accurately compute the saturation current and sub-threshold leakage of these non-ideal FinFET devices. The analytical formulations are validated by extensive twodimensional device simulations.Threshold Voltage Model The threshold voltage of a double-gate MOSFET depends strongly on the silicon film thickness, as shown in [3] using an anayltical model. But, this complete analytical model is too complex to enable easy analysis of a trapezoidal FinFET structure. Hence, we performed extensive two-dimensional device simulations using TAURUS [4] for an undoped device in a predictive 45nm technology to obtain a simplistic model. A linear fit for threshold voltage as a function of silicon film thickness is used to model this dependence (shown in Fig. 1), and matched with the model presented in [3].
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