The spread of charge induced by an ion track in an integrated circuit and its subsequent collection at sensitive nodal junctions can cause multiple-bit errors. We have experimentally and analytically investigated this phenomenon using a 256-Kbit dynamic random-access memory (DRAM). This study illustrates the effects of different charge-transport mechanisms. Two classes of ion-track multiple-bit error clusters have been identified.
A theoretical heat flow analysis for horizontal ribbon growth is presented. Equations are derived relating pull speed, ribbon thickness, thermal gradient in the melt, and melt temperature for limiting cases of heat removal by radiation only and isothermal heat removal from the solid surface over the melt. Geometrical cross sections of the growth zone are shown to be triangular and nearly parabolic for the two respective cases. Theoretical pull speed for silicon ribbon 0.01 cm thick, where the loss of latent heat of fusion is by radiation to ambient temperature (300 K) only, is shown to be 1 cm/sec for horizontal growth extending 2 cm over the melt and with no heat conduction either to or from the melt. Further enhancement of ribbon growth rate by placing cooling blocks adjacent to the top surface is shown to be theoretically possible.
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