The role of buffer traps (identified as C N acceptors through current DLTS) in the off-state leakage and dynamic Ron of 650V rated GaN-on-Si power devices is investigated. The dynamic Ron is strongly voltage-dependent, due to the interplay between the dynamic properties of the C N traps and the presence of space-charge limited current components. This results in a complete suppression of dyn Ron degradation under HTRB conditions between 420V and 850V.
The total ionizing dose (TID) response of bulk Fin-FETs is investigated for various geometry variations, such as fin width, channel length, and fin pitch. The buildup of oxide-trapped charge in the shallow trench isolation turns on a parasitic transistor, leading to increased leakage current (higher .) The TID-induced degradation increases with decreasing fin width. Transistors with longer channels degrade less than those with shorter channels. Transistors with large fin pitch degrade more, compared to those with narrow fin pitch. TCAD simulations are used to analyze the buildup of trapped charge in the trench isolation oxide and its impact on the increase in leakage current. The strong influence of charge in the STI in narrow-fin transistors induces a parasitic leakage current path between the source and the drain, while in wide-fin devices, for the same amount of trapped charge in the isolation oxide, the subsurface leakage path is less effective.Index Terms-Buried oxide, charge trapping, FinFET, geometry dependence, hole traps, isolation oxide, subthreshold slope degradation, threshold voltage shift, total ionizing dose, worst-case bias.
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