Approximately 13 nm thick HfO2 films are grown on Si wafers by atomic layer deposition under different ozone concentrations at 280 °C using Hf[N(Et)(Me)]4 as Hf precursor.
Variations in the (a) growth rate and (b) film density, measured via the XRR of the HfO2 films with O3 and H2O oxidants as a function of Ts (160–360 °C).
RuO₂ metal gates were fabricated by a reactive sputtering method under different O₂ gas ratios. For the given sputtering power of 60 W, a ∼13% O₂ ratio was the critical level below or over which RuO₂ film has hyperstoichiometric and stoichiometric compositions, which resulted in a difference in the effective work function by ∼0.2 eV. The stoichiometric RuO₂ film imposes almost no damaging effect to the underlying SiO₂ and HfO₂ gate dielectrics. The RuO₂ gate decreased the equivalent oxide thickness by ∼0.5 nm and leakage current by around two orders of magnitude compared to the Pt-gated samples.
The effect of the carbon concentration on the crystalline phase and dielectric constant (k) of atomic layer deposited HfO 2 films on Ge substrate was investigated. After annealing, the HfO 2 films grown at 200 • C and 280 • C were crystallized to the tetragonal (t) and monoclinic (m) phases, respectively, which was related to the carbon contents within the films and grain boundary energy. To clarify this, the energy difference between a t-and a m-phases ( E tetra ) was calculated by first principles calculations. The higher k value of t-HfO 2 compared to amorphous and monoclinic HfO 2 was experimentally confirmed.
The effect of deposition temperature and post deposition annealing (PDA) on the electrical properties of HfO 2 films grown on a Ge substrate by atomic layer deposition (ALD) was investigated. The HfO 2 films deposited at 280 • C (280 • C-HfO 2 ) showed a large capacitance-voltage (C-V) hysteresis, but it was significantly reduced at 200 • C (200 • C-HfO 2 ). Further reduction of deposition temperature to 160 • C resulted in the abrupt increase of C-V hysteresis. The reduction of C-V hysteresis was originated from the smaller degree of intermixing between the HfO 2 and Ge substrate with decreasing temperature, while the increase of C-V hysteresis comes from the low density of films grown at low temperatures. The C-V hysteresis characteristics were also strongly influenced by PDA temperatures. PDA temperatures higher than 550 • C induced a large C-V hysteresis regardless of deposition temperature. Interestingly, after the PDA process, the HfO 2 grown at 200 • C is crystallized to the tetragonal phase, while the HfO 2 grown at 280 • C is crystallized to the monoclinic phase. These different crystalline phases result in a lower equivalent oxide thickness in the 200 • C-HfO 2 compared to the 280 • C-HfO 2
The interfacial dead-layer (DL) effects at the interfaces between Hf-silicate films and Pt or RuO2 gate metals are examined. The Si content in the Hf-silicate film was controlled to vary the dielectric constant (k). The DL effect was strongly dependent on the k value of the Hf-silicate layer, and was suppressed when the Si content was increased to ∼80% (k ≈ 6). This Si content also coincides with the Fermi level pinning-free composition. Therefore, the optimum high-k gate dielectric structure could be a higher-k layer HfO2 capped with a lower-k layer (k ≈ 6) with minimum thickness (∼1 nm) for the best dielectric performance.
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