Nanocellulose has emerged as a sustainable and promising nanomaterial owing to its unique structures, superb properties, and natural abundance. Here, we present a comprehensive review of the current research activities that center on the development of nanocellulose for advanced electrochemical energy storage. We begin with a brief introduction of the structural features of cellulose nanofibers within the cell walls of cellulose resources. We then focus on a variety of processes that have been explored to fabricate nanocellulose with various structures and surface chemical properties. Next, we highlight a number of energy storage systems that utilize nanocellulose-derived materials, including supercapacitors, lithium-ion batteries, lithium-sulfur batteries, and sodium-ion batteries. In this section, the main focus is on the integration of nanocellulose with other active materials, developing films/aerogel as flexible substrates, and the pyrolyzation of nanocellulose to carbon materials and their functionalization by activation, heteroatom-doping, and hybridization with other active materials. Finally, we present our perspectives on several issues that need further exploration in this active research field in the future.

All-inkjet-printed, solid-state flexible supercapacitors (SCs) on paper are demonstrated as a new class of power sources with exceptionally versatile aesthetics. The inkjet-printed SCs look like inkjet-printed letters or figures commonly found in office documents and are aesthetically unitized with other printed images on paper.

Level III, retrospective comparative study.

The mechanical flexibility of a cable‐type battery reaches levels far beyond what is possible with conventional designs. The hollow‐spiral (helical) multi‐helix anode architecture is critical to the robustness under mechanical stress and facilitates electrolyte wetting of the battery components. This design enables the battery to reliably power an LED screen or an MP3 player even under severe mechanical twisting and bending.

Porous crystalline materials such as covalent organic frameworks and metal–organic frameworks have garnered considerable attention as promising ion conducting media. However, most of them additionally incorporate lithium salts and/or solvents inside the pores of frameworks, thus failing to realize solid-state single lithium-ion conduction behavior. Herein, we demonstrate a lithium sulfonated covalent organic framework (denoted as TpPa-SO 3 Li) as a new class of solvent-free, single lithium-ion conductors. Benefiting from well-designed directional ion channels, a high number density of lithium-ions, and covalently tethered anion groups, TpPa-SO 3 Li exhibits an ionic conductivity of 2.7 × 10–5 S cm–1 with a lithium-ion transference number of 0.9 at room temperature and an activation energy of 0.18 eV without additionally incorporating lithium salts and organic solvents. Such unusual ion transport phenomena of TpPa-SO 3 Li allow reversible and stable lithium plating/stripping on lithium metal electrodes, demonstrating its potential use for lithium metal electrodes.

Bulk-type all-solid-state lithium batteries (ASLBs) are considered a promising candidate to outperform the conventional lithium-ion batteries. Unfortunately, the current technology level of ASLBs is in a stage of infancy in terms of cell-based (not electrode-material-based) energy densities and scalable fabrication. Here, we report on the first ever bendable and thin sulfide solid electrolyte films reinforced with a mechanically compliant poly(paraphenylene terephthalamide) nonwoven (NW) scaffold, which enables the fabrication of free-standing and stackable ASLBs with high energy density and high rate capabilities. The ASLB, using a thin (∼70 μm) NW-reinforced SE film, exhibits a 3-fold increase of the cell-energy-density compared to that of a conventional cell without the NW scaffold.

Dynamic random access memory (DRAM) is used as the main memory of every modern computer, due to its high density, high speed and efficient memory function. Each DRAM cell consists of one transistor, which functions as a switch for the stored charge, and one capacitor where the positive or negative electric charges corresponding to the digital 1 or 0 data are stored (see Fig. 1a). For successful operation of DRAM, a large cell capacitance ($25 fF) and low leakage current at the operation voltage (10 À7 A cm À2 or 1 fA/ cell) are required because of the following reasons; during the reading operation, stored charge is shared between the cell capacitor and bit line, which is connected to the sense amplifier. In modern DRAMs, hundreds of capacitors are connected to one bit-line so that the bit-line capacitance is usually a few ten times larger than that of the capacitor. Therefore, for a bit-line voltage variation of $100 mV through the charge sharing, which is the sensing margin of the circuit, at least $25 fF of cell capacitance is necessary. [1][2][3] The low leakage current is also essential to ensure a sufficient refresh time.In a traditional Si-based capacitor, the target cell capacitance has been achieved by increasing the surface area of the capacitor (semiconductor-insulator-semiconductor, SIS, in Fig. 1b) while the dielectric thickness is scaled down according to the design rules.[4] More recently, innovations have been made in the component materials. A metal electrode, TiN or Ru, and a dielectric material with a higher-k value (k is the relative dielectric constant) than that of the SiO 2 /Si 3 N 4 layer (k $ 6-7), such as HfO 2 (k $ 25), [5,6] ZrO 2 (k $ 40) [7] and Ta 2 O 5 (k $ 25-60) [8,9] are being explored in giga-bit scale DRAMs (metal-insulator-semiconductor, MIS, and metalinsulator-metal, MIM, in Fig. 1b). The ability of a dielectric film to store charge is conveniently represented by the equivalent oxide thickness (t ox , ¼ t phy  3.9/k, where t phy is the physical thickness of the film). The minimum achievable t ox is $0.7 nm for HfO 2 , ZrO 2 and Ta 2 O 5 which are currently being used in the DRAM industry. However, the technology road map for memory devices states that t ox less than 0.5 nm is necessary for the DRAMs with a design rule of <40 nm.[10] It is also noted that there are no known material solutions to serve this purpose. Reducing the thickness of the dielectric films with k values $20-30 to achieve the required t ox results in unacceptably high leakage currents. Therefore, a dielectric material with a higher k value is in demand. Perovskite-based dielectric films such as SrTiO 3 [11,12] and (Ba,Sr)TiO 3 [13] were reported to exhibit k values of several hundreds and therefore t ox of $0.24 nm is feasible with these materials. [14] However, growth of these films is extremely difficult with the atomiclayer-deposition (ALD) which is a method of choice for the growth of the dielectric films in microelectronic devices. A low thermal budget of 500-600 8C during the deposition and post-de...

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