Modern automotive embedded systems are composed of multiple real-time tasks communicating by means of shared variables. The effect of an initial event is typically propagated to an actuation signal through sequences of tasks writing/reading shared variables, creating an effect chain. The responsiveness, performance and stability of the control algorithms of an automotive application typically depend on the propagation delays of selected effect chains. Indeed, task jitter can have a negative impact on the system potentially leading to instability. The Logical Execution Time (LET) model has been recently adopted by the automotive industry as a way of reducing jitter and improving the determinism of the system. In this paper, we provide a formal analysis of the LET model for real-time systems composed of periodic tasks with harmonic and non-harmonic periods, analytically characterizing the control performance of LET effect chains. We also show that by introducing tasks offsets, the real-time performance of non-harmonic tasks may improve, getting closer to the constant end-to-end latency experienced in the harmonic case. Further, we present a heuristic algorithm to obtain a set of offsets that might reduce end-to-end latencies, improving LET communication determinism. Finally, we apply this technique to an industrial case study consisting of an automotive engine control system.

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Normative data for 884 neurologically normal adults (15-93) are provided for a six-trial administration of Form 1 of the Spanish version of the Verbal Selective Reminding Test (VSRT). Form 2 was also administered to 391 adults (18-87). Age was the most important predictor of performance on all VSRT scores in Forms 1 and 2. Additionally, women and higher educated participants outperformed men and lower educated participants over the entire age range studied. Normative data are grouped by seven age cohorts: 15-29, 30-39, 40-49, 50-59, 60-69, 70-79, and 80-95.

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In the embedded systems domain, hypervisors are increasingly being adopted to guarantee timing isolation and appropriate hardware resource sharing among different software components. However, managing concurrent and parallel requests to shared hardware resources in a predictable way still represents an open issue. We argue that hypervisors can be an effective means to achieve an efficient and predictable arbitration of competing requests to shared devices in order to satisfy real-time requirements. As a representative example, we consider the case for mass storage (I/O) devices like Hard Disk Drives (HDD) and Solid State Disks (SSD), whose access times are orders of magnitude higher than those of central memory and CPU caches, therefore having a greater impact on overall task delays. We provide a comprehensive and up-to-date survey of the literature on I/O management within virtualized environments, focusing on software solutions proposed in the open source community, and discussing their main limitations in terms of realtime performance. Then, we discuss how the research in this subject may evolve in the future, highlighting the importance of techniques that are focused on scheduling not uniquely the processing bandwidth, but also the access to other important shared resources, like I/O devices.

With the increasing use of multi-core platforms in safetyrelated domains, aircraft system integrators and authorities exhibit a concern about the impact of concurrent access to shared-resources in the Worst-Case Execution Time (WCET). This paper highlights the need for accurate memory-centric scheduling mechanisms for guaranteeing prioritized memory accesses to Real-Time safety-related components of the system. We implemented a software technique called cache coloring that demonstrates that isolation at timing and spatial level can be achieved by managing the lines that can be evicted in the cache. In order to show the effectiveness of this technique, the timing properties of a real application are considered as a use case, this application is made of parallel tasks that show different trade-offs between computation and memory loads.Keywords: Real-Time systems · Multi-core · Determinism · Memory interference.3 Safety-critical software guidelines in different domains like ISO-26262 or IEC-61508 [6] are quite similar in many technical aspects.

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