Through this paper we developed an alternative approach to the present -day two level dynamic branch prediction structures. Instead of predicting branches based on history information, we propose to pre -calculate the branch outcome. A pre -calculated branch prediction (PCB) determines the outcome of a branch as soon as all of the branch's operands are known. The instruction that produced the last branch's operand will trigger a supplementary branch condition estimation and, after this operation, it correspondingly computes the branch outcome. This outcome is cached into a prediction table. The new proposed PCB algorithm clearly outperforms all the classical branch prediction schemes, simulations on SPEC and Stanford HSA benchmarks, proving to be very efficient. Also, our investigations related to architectural complexity and timing costs are quite optimistic, involving an original alternative to the present-day in branch prediction approach.
Neural Networks are non-linear static o r dynamical systems that learn to solve problems from examples. Most of the learning algorithms require a lot of computing power and, therefore, could benefit from fast dedicate hardware. One of the most common architectures used for this specialpurpose hardware is the Systolic Array [9]. The design and implementation of different Neural Network architectures in Systolic Arrays can be complex, however. This paper shows the manner in which the Hopfield Neural Network can be mapped into a 2 -0 Systolic Array and present an FPGA implementation of the proposed 2 -0 Systolic Array.
In the paper we propose, for an image compression system based on the Karhunen-Loeve Transform implemented by neural networks, to take into consideration the 8 square isometries of an image block. The proper isometry applied puts the 8*8 square image block in a standard position, before applying the image block as input to the neural network architecture. The standard position is defined based on the variance of its four 4*4 sub-blocks (quadro partitioned) and brings the sub-block having the greatest variance in a specific comer and in another specific adjoining corner the sub-block having the second variance (if this is not possible the third is considered). The use of this "preprocessing" phase was expected to improve the learning and representation ability of the network and, therefore, to improve the compression results. Experimental results have proven that the expectations were fulfilled and the isometries are, from now, worth to be taken into consideration. '
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