Single-walled carbon nanotubes (CNTs) may enable the fabrication of integrated circuits smaller than 10 nanometers, but this would require scalable production of dense and electronically pure semiconducting nanotube arrays on wafers. We developed a multiple dispersion and sorting process that resulted in extremely high semiconducting purity and a dimension-limited self-alignment (DLSA) procedure for preparing well-aligned CNT arrays (within alignment of 9 degrees) with a tunable density of 100 to 200 CNTs per micrometer on a 10-centimeter silicon wafer. Top-gate field-effect transistors (FETs) fabricated on the CNT array show better performance than that of commercial silicon metal oxide–semiconductor FETs with similar gate length, in particular an on-state current of 1.3 milliamperes per micrometer and a recorded transconductance of 0.9 millisiemens per micrometer for a power supply of 1 volt, while maintaining a low room-temperature subthreshold swing of <90 millivolts per decade using an ionic-liquid gate. Batch-fabricated top-gate five-stage ring oscillators exhibited a highest maximum oscillating frequency of >8 gigahertz.

No abstract

Carbon nanotubes (CNTs) have been considered a preferred channel material for constructing high-performance radio frequency (RF) transistors with outstanding current gain cutoff frequency (f T) and power gain cutoff frequency (f max) but the highest reported f max is only 70 GHz. Here, we explore how good RF transistors based on solution-derived randomly oriented semiconducting CNT films, which are the most mature CNT materials for scalable fabrication of transistors and integrated circuits, can be achieved. Owing to the significantly reduced number of CNT/CNT junctions obtained by scaling the channel length down to below 100 nm, we realized RF field-effect transistors (FETs) with maximum transconductance G m up to 0.38 mS/μm, which is the record among CNT-based RF FETs. After de-embedding the pad-induced capacitances and resistances, the CNT FETs with different gate lengths (L g) exhibit f T as high as 103 GHz (intrinsically 281 GHz) or f max up to 107 GHz (intrinsically 190 GHz), which are the records among CNT-based RF FETs. In particular, the CNT FETs with an L g of 50 nm present pad de-embedding f T of 86 GHz and f max of 85 GHz, and represent the best CNT RF transistor in terms of comprehensive performance to date. To demonstrate the actual high-speed and scalable fabrication of our CNT RF FETs, we fabricated CNT FET-based five-stage ring oscillators with oscillation frequencies above 5 GHz.

Handling the explosion of massive data not only requires signi cant improvements in information processing, storage and communication abilities of hardware but also demands higher security in the storage and communication of sensitive information. As a type of hardware-based security primitives, physically unclonable functions (PUFs) represent a promising emerging technology utilizing random imperfections existing in a physical entity, which cannot be predicted or cloned. However, if a PUF is exploited to carry out secure communication, the keys inside it must be written into non-volatile memory and then shared with other participants that do not hold the PUF, which makes the keys vulnerable. Here, we show that identical PUFs, e.g. twin PUFs can be fabricated on the same aligned carbon nanotube arrays and optimized to yield excellent uniformity, uniqueness, randomness, and reliability. The twin PUFs show a good consistency of approximately 95 % and are used to demonstrate secure communication with a bit error rate reduced to one trillion through a fault-tolerant design. As a result, our twin PUFs offering a convenient, low-cost and reliable new technology for guarantee information exchange security.

Silicon-based complementary metal–oxide–semiconductor (CMOS) has been the mainstream logic style for modern digital integrated circuits (ICs) for decades but will meet its performance limits soon. Extensive investigations have thus been carried out using other semiconductors, especially those with extremely high carrier mobility. However, these materials usually have small or even zero band gap, which leads inevitably to large leakage current or voltage loss in ICs based on these semiconductors. In this work, we propose and demonstrate a strengthened CMOS (SCMOS) logic style using modified field-effect transistors (FETs) to solve this problem, that is, to achieve high performance, utilizing the high carrier mobility in these materials, and to reduce the current leakage resulting from their small band gap. Conventional CMOS FETs are modified to have an asymmetric structure where an additional assistant gate is introduced near the drain to further lower the potential barrier in on-state and to increase the barrier in off-state. SCMOS ICs are constructed using these modified asymmetric CMOS FETs, which demonstrate perfect rail-to-rail output with negligible voltage loss and 3 orders of magnitude suppression of the static power consumption and an operating speed similar to or even higher than that of CMOS ICs. Here, SCMOS is demonstrated using carbon nanotubes, but, in principle, this logic style can be used in ICs based on any small-band-gap semiconductors to provide simultaneously high performance and low power consumption.

However, the development of CNT-based ICs can hardly progress without a uniform wafer-scale semiconducting CNT film. Solution-derived CNT randomly oriented films have become the most mature material for constructing FETs and ICs owing to their high semiconducting purity and wafer-scale uniformity. [7][8][9] In the past five years, great progress has been made in randomly oriented CNT film-based FETs and ICs, [8][9][10][11] and even a 16-bit microprocessor has been demonstrated, [12] which fully demonstrates the feasibility of CNTbased digital ICs. [13][14][15] Furthermore, p-type FETs and ICs built on randomly oriented CNT films present high performance comparable to that of Si p-type metal-oxide-semiconductor FETs when the channel length is scaled down to deep submicrometer. [8,10,16] It indicates that the unsatisfactory CNT film is good enough as a channel material for high-performance digital CMOS ICs. However, the performance of digital CMOS ICs built on solution-derived CNT films is far from expected since n-type FETs suffer from obviously low performance at a submicrometer channel length. [10] Although doping-free technology on CNT network films has been developed to construct CMOS transistors with symmetric p-and n-FETs at a micrometer-sized gate length (>1 μm), [9] n-FETs begin to exhibit much lower performance than p-FETs when the scaled gate length is below 1 μm. [10] Specifically, for the best reported 200 nm gate length CNT CMOS FETs, the driving current and peak transconductance in n-FETs are one-half of those in p-FETs. [10] Very recently, 0.13 μm node (285 nm actual channel length) p-type CNT FETs have been successfully fabricated in commercial silicon manufacturing facilities. [17] However, symmetric CMOS FETs with submicrometer gate length are still not demonstrated, mainly due to the poor contact with a Schottky barrier (SB). SB formation may be caused by a series of complex factors like the residual polymer wrapped on CNTs during the sorting process, metal-induced gap states, defect-induced gap states, and CNT film orientation, [9,10,18,19] which affects n-type contacts more severely than p-type contacts for CNT FETs. As the gate length is further scaled down into the deep submicrometer region, the impact of the contact quality becomes dominant, indicating that achieving symmetric CMOS performance becomes more difficult. Therefore, high-performance CMOS FETs with deep Semiconducting carbon nanotube (CNT) films are considered promising channel materials for constructing complementary metal-oxide semiconducting (CMOS) field-effect transistors (FETs) for future high-performance integrated circuits (ICs). However, the poor performance of short channel n-type FETs built on solution-derived CNT films hinders the development of truly symmetric CMOS FETs, especially as the gate length scales down to the submicrometer region. The performance of short channel n-type FETs is improved here by using scandium contacts accompanied by a doping channel and high-performance and symmetrical CMOS FETs with a deep ...

Owing to the combination of high carrier mobility and saturation velocity, low intrinsic capacitance, and excellent stability, the carbon nanotube (CNT) has been considered as a perfect semiconductor to construct radio frequency (RF) fieldeffect transistors (FETs) and circuits with an ultrahigh frequency band. However, the reported CNT RF FETs usually exhibited poor real performance indicated by the as-measured maximum oscillation frequency (f max ), and then the amplifiers, which are the most important and fundamental RF circuits, suffered from a low power gain and a low frequency band. In this work, we build RF transistors on solution-derived randomly orientated CNT films with improved quality and uniformity. The randomly orientated CNT film FETs exhibit the record as-measured maximum f max of 90 GHz, demonstrating the potential for over 28 GHz (at least one-third of 90 GHz) 5G mmWave (frequency range 2) applications. Benefiting from the large-scale uniformity of CNT films, FETs are designed and fabricated with a large channel width to present low internal resistance for the standard 50 Ω impedance matching guide line, which is critical to construct an RF amplifier. Furthermore, we first demonstrate amplifiers with a maximum power gain up to 11 dB and output third-order intercept point (OIP3) of 15 dBm, both at the K-band, which represents the record of a CNT amplifier and is even comparable with a commercial amplifier based on III−V RF transistors.

Metamaterial induced transparency (MIT) has shown great application potential in terahertz regime, which is of great significance in constructing photonic components such as slow light systems and tunable filters. The single or multiple transparent windows can be induced through near-field coupling via two or more resonant modes. Compared with the single MIT, multi-MIT effect can realize multiband sensing, communication, and storage applications. Here, we design a dual-MIT metastructure composed of three bright resonators including a cut-wire resonator (CWR), a pair of large toroidal split ring resonators (LTSRRs), and a pair of small toroidal split ring resonators (STSRRs). Dual-MIT windows can be induced through coupling between the electric dipole resonance and two inductance capacitance (LC) resonances. By optimizing and adjusting the geometric parameters of the metasurface, the resonant strength could be suppressed or enhanced. Thus, we can passively manipulate the frequency and amplitude of the dual-MIT windows and realize the switching between the two windows and single MIT. In addition, by actively tuning the conductivity of photosensitive Si introduced in the gap of the LTSRRs and STSRRs, we observe the LC resonance can be weakened to quench the dual-MIT windows. Our research provides an approach to explore the miniaturized, multi-functional, and switching components in terahertz regime.