In the IC industry the mask cost and cycle time have increased dramatically since the chip design has become more complex and the required mask specification, tighter. The lithography technology has been driven to 65-nm node and 90-nm product will be manufacturing in 2004, according to ITRS's roadmap. However, the optical exposure tools do not extend to a shorter wavelength as the critical dimension (CD) shrinks. In such sub-wavelength technology generation, the mask error factor (MEF) is normally higher. Higher MEF means that tighter mask specification is required to sustain the lithography performance. The tighter mask specification will impact both mask processing complexity and cost. The mask is no longer a low-cost process. In addition, the number of wafers printed from each mask set is trending down, resulting in a huge investment to tape out a new circuit. Higher cost discourages circuit shrinking, thus, prohibits commercialization of new technology nodes.How to reduce the mask cost and cycle time? Robust mask processes will play a crucial role but it is an extreme challenge for the mask-processing people. For example, the blank mask provided by the vender has been coated with the resist. Each batch of blank masks needs to find an optimal dose to meet the rigorous CD specification, since these coating blanks are sent out to the mask house in different periods and through different transportation conditions. The cycle time and the data size also increase drastically when higher transistor density is demanded and smaller pattern jags are created by the aggressive OPC. The vacuum, heating and fogging effects will worsen the process control of the e-beam writer due to a long writing time. The well-controlled transmission and phase shift changes after the cleaning process also become crucial, when an Att-PSM consisting of lines and spaces is fabricated. Dry cleaning may be one possible solution. The mask cost contributed from the defect inspection process has risen significantly, since the price of next generation tool increased but the throughput decreased. After the implementation of model-based OPC, the circuit layout is full of small jig and jag patterns making the failure rate of defect repair higher. In order to reduce cycle time and mask cost, the optimization of both OPC Downloaded From: http://proceedings.spiedigitallibrary.org/ on 06/21/2016 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx algorithm and circuit design needs the closer cooperation between designers, wafer process engineers and mask makers. A close linking of wafer processing, mask making, and OPC as found in captive mask houses is becoming indispensable.

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Nowadays, the CD(Critical Dimension) control on masks manufacturing plays an important role in photolithography process for 90-nm node technology and below. The process performance of photolithography will degrade severely even when the mask CD error is small. One of the most important process-induced mask CD errors comes from the dry etching process. With the loading effect due to environment pattern variations, isolated and dense patterns have different etching biases. Furthermore, the loading effect can induce an overall CD variation called global loading effect contributed from the pattern density change in large areas and a CD variation on individual monitor pattern called micro-loading effect contributed from various feature dimensions in the near region. The micro-loading effect can also be classified as the "nearest spacing" effect which is dependent upon the space between the nearest neighbor pattern and the monitor pattern, and the "nearest neighbor" effect which is dependent upon the size of the nearest neighbor feature around the monitor pattern.All of these effects enlarge the total range of mask CD linearity and proximity errors.In this paper we report the result of the global loading effect and micro-loading effect by varying pattern densities and feature dimensions nearby. With the design of test pattern, the global loading effect and the micro-loading effect can be separated. The CD variation dominated by the micro-loading effect in the dry etching process is observed. This large etching bias change resulted from the micro-loading effect is consistent with the depletion of radical species in the narrow space during the etching process.

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