The stacking faults grown into silicon during thermal oxidation were shrunk by high temperature heat-treatment in a nitrogen atmosphere. The activation energy for fault shrinkage was 5.2 eV, and nearly equal to that of silicon self-diffusion, 5.13 eV. The shrinkage phenomenon is due to the removal of silicon atoms, which form the stacking faults of extrinsic type, by diffusion via vacancies. Therefore the shrinkage rate depends on the vacancy concentration" in silicon. The high concentration diffusion of boron, phosphorus, and arsenic in silicon generates the excess vacancies induced by donor doping, or by the stress due to solute lattice contraction of the impurity. The shrinkage of stacking faults by these excess vacancies was investigated. The faults shrank rapidly and disappeared for a short time in comparison with simple heat-treatment. The annihilation of stacking faults in silicon was also influenced by the coulomb interaction or the complex formation between the negatively charged vacancy and impurity.Thermal oxidation is one of the important processes in the manufacture of silicon planar transistors and other devices. Crystallographic defects such as stacking faults are often introduced in silicon in this oxidation process (1-5). When stacking faults lie across a p-n junction, excess reverse leakage currents in the junction are increased (6). Therefore, it is necessary to suppress stacking fault generation. If a crystal free from mechanical damage and grown-in defects, which act as the nucleation, is used, stacking faults are not generated. However, it is difficult to obtain such a crystal. Accordingly, the suppression of stacking fault generation and shrinkage of the faults by HC1 oxidation (7), or the preoxidation gettering of silicon wafers by misfit dislocations due to phosphorus diffusion (8), etc. have been carried out. Stacking faults also can be shrunk by high temperature heat-treatment (9).In this study, the shrinkage of stacking faults was investigated first. It was found that the shrinkage related intimately to the vacancy concentration in silicon. The vacancy concentration depends not only on treatment temperature, but also on impurity doping. And so the relation between the annihilation of stacking faults and the excess vacancies which were ~nduced during impurity diffusion into silicon was studied, and the mechanism of the annihilation is discussed. ExperimentalThe specimen wafers used in these experiments were 1-5 ~-cm (100) oriented dislocation-free silicon crystals grown by the Czochralski method. They were doped with phosphorus for n-type and boron for ptype. The surface was mechanically polished and the thickness was about 250 ~m. After appropriate treatments, they were etchd in a HF:HNO3 = 1:5 solution for 2 min to remove the surface mechanical damage. The oxidation of silicon was carried out at 1200~ in dry oxygen for 210 min. This thermal oxidation grew a stacking fault in the silicon crystal about 40 ~m long, provided that the fault size was defined as the fault length on the silic...

A method is described which makes full use of the data gathered in measuring the elastic constants and internal friction of small samples undergoing free decay. A Fourier transform approach is employed which first determines accurately the period and starting phase of the free decay and checks the purity of the signal. This information is then used along with the original data to determine the internal friction of the sample.

Selectively Si-doped GaAs/N-AlGaAs heterojunction structures have been grown by MBE. Two-dimensional electron gas accumulating at the interface of the heterojunction showed mobilities as high as 69,000 cm2/Vs at 77 K and 100,000 cm2/Vs at 4.2 K, with a sheet electron concentration of 5.5×1011 cm-2, which are higher than any reported so far. An enhancementmode high electron mobility transistor (E-HEMT), which was first fabricated from the heterojunction material, showed a field effect mobility of 49,300 cm2/Vs at 77 K, suggesting that this heterojunction material has potential for application to low-power, high-speed integrated circuits.

Based on the optical transitions among the quantum-confined electronic states in the conduction band, we have fabricated multi-bands AlGaN/GaN quantum well infrared photodetectors. Crack-free AlGaN/GaN multiple quantum wells (MQWs) with atomically sharp interfaces have been achieved by inserting an AlN interlayer, which releases most of the tensile strain in the MQWs grown on the GaN underlayer. With significant reduction of dark current by using thick AlGaN barriers, photoconductive responses are demonstrated due to intersubband transition in multiple regions with center wavelengths of 1.3, 2.3, and 4 μm, which shows potential applications on near infrared detection.

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