A detailed study on the application of Pd nanoparticle arrays, produced by self-assembled block copolymer templates, in bonding of III–V-based solar cell materials was carried out. The Pd nanoparticle array-mediated bonding (mechanical stacking) of GaAs-based thin-films (cells) was readily performed on the surface of GaAs or InP-based substrates (cells) to form multi-junction device architectures. Using the optimized Pd NP array, a 30.4%-efficiency four-junction two-terminal cell, consisting of an InGaP/GaAs top cell and an InGaAsP/InGaAs bottom cell, was achieved owing to the excellent electrical and optical bonding properties (bonding resistance, 1.81 Ω cm2; optical loss, 2.9%). Together with the verification of the long-term reliability of the Pd nanoparticle array-mediated bonding, our approach would become practically attractive for producing high-efficiency multi-junction solar cells.
Multijunction (MJ) solar cells achieve very high efficiencies by effectively utilizing the entire solar spectrum. Previously, we constructed a III‐V//Si MJ solar cell using the smart stack technology, a unique mechanical stacking technology with Pd nanoparticle array. In this study, we fabricated an InGaP/AlGaAs//Si three‐junction solar cell with an efficiency of 30.8% under AM 1.5G solar spectrum illumination. This efficiency is considerably higher than our previous result (25.1%). The superior performance was achieved by optimizing the structure of the upper GaAs‐based cell and employing a tunnel oxide passivated contact Si cell. Furthermore, we examined the low solar concentration performance of the device and obtained a maximum efficiency of 32.6% at 5.5 suns. This performance is sufficient for realistic low concentration photovoltaic applications (below 10 suns). In addition, we characterize the reliability of the InGaP/AlGaAs//Si three‐junction solar cell with a damp heat test (85 °C and 85% humidity for 1000 h). It was confirmed that our solar cells have high long‐term stability under severe conditions. The results demonstrate the potential of GaAs//Si MJ solar cells as next‐generation photovoltaic cells and the effectiveness of smart stack technology in fabricating multijunction cells.
A new technique of surface passivation of silicon substrates by quinhydrone/ethanol treatment has been investigated. To estimate the surface passivation effect, the lifetimes of the silicon substrates were measured using the microwave photoconductive decay method. The measured lifetimes were dependent on quinhydrone concentration and passivation time. The 0.01 mol/dm3 quinhydrone/ethanol treatment showed a good passivation effect, and a very low surface recombination velocity was obtained. The quinhydrone/ethanol treatment was a more effective passivation technique than the iodine/ethanol treatment. Therefore, the quinhydrone/ethanol passivation can be widely used for lifetime measurement.
The impact of Si wafer thickness on the photovoltaic performance of hydrogenated amorphous silicon/crystalline silicon (a-Si:H/c-Si) heterojunction solar cells was examined from the optical and electrical points of view. Optical characterization of c-Si wafers of various thicknesses showed that a realistic light-trapping scheme, i.e., pyramidally textured Si wafers with a dielectric antireflection coating and a back reflector, realizes an efficient quasi-Lambertian light absorption enhancement, even for very thin wafers. This indicates that high photocurrent densities are achievable by using the realistic light-trapping scheme, assuming that the parasitic absorption loss is minimized. The potentials of open-circuit voltage (V OC ) and the fill factor (FF) of thin c-Si cells were investigated using thin c-Si wafers passivated with intrinsic/doped amorphous silicon film stacks. It was experimentally confirmed that the implied V OC increases steadily with decreasing wafer thickness down to 30 µm, while the implied FF weakly depends on the thickness. As a result of the trade-off between light absorption and implied V OC , a high implied efficiency is expected for a wide range of wafer thicknesses. The V OC increase by thinning the wafer was also experimentally confirmed in an a-Si:H/c-Si heterojunction cell with a thickness below 60 µm, resulting in a conversion efficiency of 21.0%.
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