Abstract-Networks-on-Chip (NoCs) are emerging as the way to interconnect the processing cores and the memory within a chip multiprocessor. As recent years have seen a significant increase in the number of cores per chip, it is crucial to guarantee the scalability of NoCs in order to avoid communication to become the next performance bottleneck in multicore processors. Among other alternatives, the concept of Wireless Network-onChip (WNoC) has been proposed, wherein on-chip antennas would provide native broadcast capabilities leading to enhanced network performance. Since energy consumption and chip area are the two primary constraints, this work is aimed to explore the area and energy implications of scaling a WNoC in terms of (a) the number of cores within the chip, and (b) the capacity of each link in the network. To this end, an integral design space exploration is performed, covering implementation aspects (area and energy), communication aspects (link capacity) and networklevel considerations (number of cores and network architecture). The study is entirely based upon analytical models, which will allow to benchmark the WNoC scalability against a baseline NoC. Eventually, this investigation will provide qualitative and quantitative guidelines for the design of future transceivers for wireless on-chip communication.
This study presents a detailed fabrication method, together with validation, discussion, and analysis, for state-of-the-art silicon carbide (SiC) etching of vertical and bevelled structures by using inductively coupled plasma reactive ion etching (ICP-RIE) for microelectronic applications. Applying different gas mixtures, a maximum bevel angle of 87° (almost vertical), large-angle bevels ranging from 40° to 80°, and small-angel bevels ranging from 7° to 17° were achieved separately using distinct gas mixtures at different ratios. We found that SF6 with additive O2 was effective for vertical etching, with a best etching rate of 3050 Å/min. As for the large-angle bevel structures, BCl3 + N2 gas mixtures show better characteristics, exhibiting a controllable and large etching angle range from 40° to 80° through the adjustment of the mixture ratio. Additionally, a Cl2 + O2 mixture at different ratios is applied to achieve a small-angel bevels ranging from 7° to 17°. A minimum bevel angel of approximately 7° was achieved under the specific volume of 2.4 sccm Cl2 and 3.6 sccm O2. These results can be used to improve performance in various microelectronic applications including MMIC via holes, PIN diodes, Schottky diodes, JFETs’ bevel mesa, and avalanche photodiode fabrication.
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