A wideband noise-cancelling low-noise amplifier (LNA) combining resistor feedback and source-follower feedback (SFF) is proposed. The SFF facilitates upsizing of the feedback resistor to improve the gain and noise figure (NF), without compromising the input-impedance matching. Another benefit is that the noise contributions of both the feedback resistor and noise-cancelling transistors are significantly reduced. Fabricated in 65-nm CMOS, the LNA exhibits a voltage gain of 16.8 dB, and a flat NF of 3.3 ± 0.45 dB over a −3-dB bandwidth of 0.5 to 7 GHz. The power consumption is 11.3 mW at 1.2 V, and the die area is 0.044 mm 2 .
This paper reports two variable-gain amplifiers (VGAs) featuring a new pseudo-currentsteering gain-tuning technique. In the first VGA (VGA-I), a single-voltage-controlled dual-branch current mirror is developed as a standalone gain control block. In the second VGA (VGA-II), two NMOS transistors, which are biased by a tunable voltage, are integrated into a conventional common-source amplifier to steer away from a part of the total current. Meanwhile, the theoretical analysis is developed to reveal the mechanism of different gain tuning. Fabricated in a 40-nm CMOS process, VGA-I (VGA-II) occupies a tiny area of 0.03 mm 2 (0.024 mm 2) and consumes 22 mW (20 mW). Measured over a gain range of > 64 dB, the-3-dB bandwidth of VGA-I (VGA-II) is 9 GHz (6.6 GHz). For the time-domain tests, VGA-I (VGA-II) exhibits a jitter of 40 ps (30 ps), under a 2 7-1 PRBS input at 12 Gb/s. Their power efficiencies (1.83 and 1.67 pJ/bit) compare favorably with state-of-the-art. INDEX TERMS CMOS, high-speed transceiver, variable-gain amplifier (VGA), negative capacitance (NC), peak-to-peak jitter, data-dependent jitter (DDJ), pseudo-current steering, wide-tuning gain control, dual-branch current mirror, active inductor.
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