Device simulation is used to investigate the current-voltage efficiency performance in CdTe/CdS photovoltaic solar cell. The role of several limiting factors such as back contact Schottky barrier and its relationship to the doping density and layer thickness is examined. The role of surface recombination velocity at back contact interface and extended CdTe layer is included. The base CdS/CdTe experimental device used in this study shows an efficiency of 16-17%. Simulation analysis is used to optimize the experimental base device under AM1.5 solar spectrum. Results obtained indicate that higher performance efficiency may be achieved by adding and optimizing an extended CdTe electron reflector layer at the back Schottky contact. In the optimization of the CdS/CdTe cell an extended electron reflector region with a barrier height of 0.1 eV and a doping density of 7 × 10 18 cm −3 with an optimum thickness of 100 nm results in best cell efficiency performance of 19.83% compared with the experimental data.
A comprehensive comparison of 3C-SiC and 4H-SiC power MOSFETs was performed, aimed at quantifying and comparing the devices’ on-resistance and switching loss. To this end, the relevant material parameters were collected using experimental data where available, or those obtained by simulation. This includes the bulk mobility as a function of doping density, the breakdown field as a function of doping and the MOSFET channel mobility. A device model was constructed and then used to calculate the on-resistance and breakdown voltage of a properly scaled device as a function of the doping density of the blocking layer. A SPICE model was constructed to explore the switching transients and switching losses. The simulations indicate that, for the chosen material parameters, a 600 V 3C-SiC MOSFET has an on-resistance, which is less than half that of a 4H-SiC MOSFET as are the switching losses in the device.
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