First isolated in 2004,1 graphene has received tremendous scientific attention due to its unique electronic properties.2 Graphene also features edge dynamics 3 and mechanical properties, 4 opening up even more opportunities such as its use to sequence genomic DNA using nanopores. 5 In order to harvest the many promising properties of graphene in applications, a technique is required to cut, shape or sculpt the material on a nanoscale without damage to its atomic structure, as this drastically influences the electronic properties of the nanostructure. Here, we reveal a temperature-dependent self-repair mechanism allowing damage-free atomic-scale sculpting of graphene using a focused electron beam. Our technique allows reproducible fabrication and simultaneous imaging of singlecrystalline free-standing nanoribbons, nanotubes, nanopores, and single carbon chains.Temperature has a remarkable effect on the changes induced by 300 keV electrons (Figure 1). At room temperature (RT), a rapid amorphisation occurs, which prevents detailed high-resolution electron microscopy (HREM). At temperatures of 200 °C, we observe that electron beam irradiation leads to amorphisation with only short range order (Figure 1a). At 500 °C, the electron beam results in the formation of polycrystalline monolayers. The single crystalline graphene transforms into polycrystalline graphene with clear straight but short grain boundaries. At 700 °C, remarkably, graphene conserves its full crystallinity even under a very intense electron beam, as shown in Figure 1c. Figure 2 shows various graphene nanostructures made at 600°C~700°C. Carbon nanotubes can be made using elongated electron beams with a shape similar to the holes made (Figure 2a, inset).
In this paper, we present an SU-8 based evanescent waveguide with a vertical structure as a biomedical sensor. The waveguide is designed vertically to generate evanescent waves on both left and right surfaces for sensing. It is fabricated by E-beam lithography with only one-step process which has the advantage of a better surface quality compared with commonly used dry etching methods. Furthermore, fabrication time and cost is cut down greatly. The surface of the designed waveguide can be functionalized with antibodies to immobilize specific bacteria on it. After surface functionalization and incubation with E. coli solutions of different concentrations, the waveguides absorption was measured. The results demonstrate that the waveguide is sensitive to E. coli concentration changes. In addition, tapers were designed and added to the waveguide to relieve the alignment tolerance for the aim of making a plug-and-play bedside diagnostic system.
We present a novel, wafer-based fabrication process that enables integration and assembly of electronic components, such as ASICs and decoupling capacitors, with flexible interconnects. The electronic components are fabricated in, or placed on precisely defined and closely-spaced silicon islands that are connected by interconnects embedded in parylene-based flexible thin film. This fully CMOS compatible approach uses optimized DRIE processes and an SiO2 mesh-shaped mask, allowing for the simultaneous definition of micrometer- to millimeter-sized structures without compromising the flexibility of the device. In a single fabrication flow a unique freedom in dimensions of both the flexible film and the silicon islands can be achieved making this new technique ideal for the realization of semi-flexible/foldable implantable devices, where structures of different sizes have to be combined together for the ultimate miniaturization.
We present the world's first backside-illuminated (BSI) single-photon avalanche diode (SPAD) based on standard silicon-on-insulator (SOI) complementary metal-oxidesemiconductor (CMOS) technology. This SPAD achieves a good dark count rate (DCR) after backside etching, comparable to DCRs of BSI SPADs fabricated on bulk wafers. Unlike bulk-wafer-based BSI SPADs, which typically suffer from poor violet and blue sensitivity, the proposed BSI SPAD features increased near-ultraviolet sensitivity as well as significant sensitivity in the violet and blue spectral ranges, thanks to the ultrathin-body SOI. To the best of our knowledge, this is the best result ever reported for any BSI SPAD in the standard CMOS technology. In addition, it also shows high sensitivity at long wavelengths thanks to the interface between silicon and silicon-dioxide layers. Therefore, it achieves a photon detection probability over 26% at 500 nm and 10% in the 400-875 nm wavelength range at 3 V excess bias voltage. The timing jitter is 119 ps full width at half maximum at the same operation condition at 637 nm wavelength. For the proposed BSI SPAD, the buried oxide layer in SOI wafers is used as an etching stop during the wafer backside-etching process, and therefore it ensures the excellent performance uniformity in large arrays.
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