This work presents the implementation of an asynchronous event detector circuit by applying subthreshold standard cells. The presented circuit operates in an on-chip power management unit (PMU) of a wireless sensor node. Such an application demands an ultra-low power architecture for an increased overall lifetime of the sensor node. The asynchronous circuit architecture and its subthreshold logic implementation both significantly reduce the leakage power dissipation by factor three. The presented event detector is realized in a 130 nm CMOS process with regular transistors operating from a 200 mV supply voltage.
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