This paper describes a new concept for low power consumption TFT-LCDs, based on monolithic multi-drivers. The multi-driver architecture consists of two data line drivers, one analogue, one binary, that can operate in tandem or independently. The analogue driver allows the display to show high quality full colour video images. The binary driver provides 8 colour text data display, either on its own, or superimposed onto the image provided by the analogue driver. Operation of the binary driver consumes 1/10 th of the power that operation of the analogue driver needs. The display module can therefore operate at substantially lower power for many display applications, yet still achieve high display performance when demanded.
Much work has been undertaken to demonstrate the advantages of analogue V U 1 for implementing neural architectures. This paper attempts to address the issues concerning 'in-situ' learning with analogue V U 1 multi-layer perceptron ( M U ) networks. In particular, we propose that 'chip-in-the-loop' learning is, at the very least, necessary to overcome typical analogue process variations and we argue that MLPs containing analogue circuits with 8 bit precision can be successfully trained provided they have digital representations of the weights of at least 12 bits. We demonstrate that weight perturbation, with careful choice of the perturbation size, gives improved results over backpropagation, at the cost of increased training time. Indeed, we go on to show why weight perturbation is possibly the only sensible way to implement MLP 'on-chip' learning.We have designed a set of analogue V U I chips specifically to see ifour theoretical results on learning work in practice.Although these chips are experimental, it is our intention to use them to solve 'real world' problems which have relatively low input dimensionality, such as the task of speaker identijication.
This paper describes an advanced digital display that we have developed for future mobile applications. The 2" QVGA LCD display contains multi-format digital drivers integrated with a low-temperature Continuous Grain Silicon TFT process. These drivers automatically configure the display format based on the contents of the image data that is transmitted to the panel. This strategy provides an optimum balance between display performance and power consumption.
There has been a rapid increase in the resolution of small-sized and medium-sized displays. This study determines an upper discernible limit for display resolution. A range of resolutions varying from 254-1016 PPI were evaluated using simulated display by 49 subjects at 300 mm viewing distance. The results of the study conclusively show that users can discriminate between 339 and 508 PPI and in many cases between 508 and 1016 PPI.
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