Neuro-inspired deep learning algorithms have shown promising futures in artificial intelligence. Despite the remarkable progress in software-based neural networks, the traditional von-Neumann hardware architecture has suffered from limited energy efficiency while facing unprecedented large amounts of data. To meet the performance requirements of neuro-inspired computing, large-scale vector-matrix multiplication is preferred to be performed in situ, namely compute-in-memory. Non-volatile memory devices with different materials have been proposed for weight storage as synaptic devices. Among them, HfO 2 -based ferroelectric devices have attracted great attention because of their low energy consumption, good complementarymetal-oxide-semiconductor (CMOS) compatibility and multi-bit per cell potential. In this review, recent trends and prospects of the ferroelectric synaptic devices are surveyed. First, we present the three-terminal synaptic devices based on the ferroelectric field effect transistor (FeFET), and discuss the switching physics of the intermediate states, the back-end-of-line integration and the 3D NAND architecture design. Then, we introduce a hybrid precision synapse concept that leverages the volatile charges on the gate capacitor of the FeFET and the non-volatile polarization on the gate dielectric of the FeFET. Lastly, we review two-terminal synaptic devices using the ferroelectric tunnel junction (FTJ) and ferroelectric capacitor (FeCAP). The design margins of the crossbar array with FTJ and FeCAP analyzed.
Since the discovery of ferroelectricity in doped/alloyed HfO2 and ZrO2 thin film, many device engineers have been attracted to its sustainable ferroelectricity at the thickness of a few nanometer. While most of the previous studies have mainly focused on the ferroelectric properties of the thermally atomic layer deposited (THALD) Hf0.5Zr0.5O2 (HZO), the plasma-enhanced ALD (PEALD) HZO has not received much attention. In this work, a direct comparison between the two types of HZO thin films is carried out, where we found that a tradeoff exists between these two fabrication methods. While the THALD HZO was able to maintain a higher cycling endurance, the PEALD HZO showed more stable characteristics over the cycling with reduced wake-up and fatigue effects, in addition to better tolerance against breakdown under high electric field. Furthermore, the PEALD HZO could be crystallized with post deposition annealing at 350 °C, which is of great interest for the back-end-of-line compatibility with silicon fabrication processes.
The random variation sources have a significant influence on the performance of ferroelectric field-effect transistor (FeFET). In this work, comparative analysis on the process variation induced variability of FeFET towards a 7 nm technology node has been conducted, including different device structures from bulk to FDSOI and FinFET. The random ferroelectric/dielectric phase variation (PV), the metal work function variation (WFV) and the line-edge roughness (LER) effects are incorporated in TCAD simulations to quantitatively investigate their impacts on the threshold voltage variation. Especially, the Voronoi diagram is employed to realistically model the ferroelectric grain distributions and to accurately simulate the impact of PV on FeFET characteristics.
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