Abstract-Packaging of planar MMICs poses a unique challenge at microwave frequencies as the dimensions of the encapsulating cavity are comparable to wavelength at the operational frequencies. In addition, the effect of ground loops (caused by bond wires exposed to ground over extended length due to gaps between interconnects) deteriorates the situation even further in circuits like MMIC switches requiring high isolation between ports. The ground loops cause reflections thereby deteriorating the insertion loss figure of merit. This paper presents optimization of design of a metal ceramic package used for packaging an SPDT MMIC switch working in the frequency range of 5-6 GHz. The microwave performance of the package was simulated using EM simulation with parameters including cavity dimensions, port placement, gaps between interconnect lines, package feed-thrus and MMIC chip pads. Detailed characterization of the bare package and packaged SPDT MMIC done later shows a good match between the simulated and measured performance. The SPDT MMIC performance degradation was arrested by improvement in the package structure and it showed insertion loss of −1.6 dB and input/output (I/O) return losses of ∼ 16 dB in the new package as compared to the values of −2.1 dB insertion loss and −12 dB I/O return losses in the original package. The port-to-port isolation remained unchanged (∼ 40 dB in both cases) as it is governed by the MMIC assembly inside the package rather than the conditions at the I/O interfaces in this kind of large sized packages.
Summary
This paper presents the design and implementation of a 7‐bit S‐band digital passive phase shifter using Complementary Metal‐Oxide‐Semiconductor (CMOS) 65‐nm technology in 2.6‐ to 3.2‐GHz frequency band. New switched delay network topology has been used for 5.625° and 2.8°, and modified switched filter topology has been used for implementation of other phase bits to achieve 7‐bit performance with low insertion loss and better isolation. The measured results of the fabricated chip show 7‐bit performance with an average insertion loss of 11 dB, average root mean square (RMS) phase error of less than 2.0°, average RMS amplitude error of less than 0.6 dB, input matching (S11) better than −7.5 dB, and output matching (S22) better than −14.5 dB across the target frequency band at 50Ω input/output impedance.
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