The entomopathogenic fungus Beauveria bassiana and the predatory mite Neoseiulus barkeri are both potential biocontrol agents for their shared host/prey Frankliniella occidentalis. The combination of the two agents may enhance biological control of F. occidentalis if the fungus does not negatively affect N. barkeri. This study evaluated the indirect effects of B. bassiana strain SZ-26 on N. barkeri mediated by F. occidentalis using the age-stage, two-sex life table. When fed on the first instar larvae of F. occidentalis that had been exposed for 12 h to the SZ-26 suspension, the developmental time of preadult N. barkeri was significantly longer, and the longevity and fecundity were significantly lower than that of N. barkeri fed on untreated F. occidentalis. The mean generation time (T), net reproductive rate (R0), finite rate of increase (λ), intrinsic rate of natural increase (rm) and predation rates were correspondingly affected. The data showed that B. bassiana has indirect negative effects on N. barkeri population dynamics via influencing their prey F. occidentalis larvae, which indicates that there is a risk in combining B. bassiana with N. barkeri simultaneously for the biocontrol of F. occidentalis. The probable mechanism for the negative effects is discussed.

This paper presents a four-level pulse amplitude modulation (PAM-4) receiver that incorporates a continuous time linear equalizer, a variable gain amplifier, a phase interpolatorbased clock and data recovery, and a 4-tap direct decision feedback equalizer (DFE) for moderate channel loss applications in wireline communication. A dynamic current-mode logic comparator (DCMLC) is proposed and employed in the DFE. The DCMLC, which adopts dynamic logic, breaks the trade-off between the bandwidth and the clock to Q delay in the traditional current-mode logic comparator (CMLC). Compared with the traditional CMLC, the DCMLC reduces the clock to Q delay by 36%, which allows the implementation of a 4-tap direct DFE. Moreover, the first tap feedback signals are directly tapped from the output of the DCMLC, allowing the first tap feedback current to initiate 0.5UI before the decision clock. The PAM-4 receiver prototype is fabricated in a 65nm CMOS process. At a data rate of 56-Gbps, it can compensate for up to 20.17dB loss and achieve a bit error rate < 1E-10 with a power efficiency of 4.75 pJ/bit. Index Terms-Receiver (RX), four-level pulse amplitude modulation (PAM-4), decision feedback equalizer (DFE), clock and data recovery (CDR). I. INTRODUCTIONT HE ever-increasing bandwidth requirements of communication systems have driven wireline transceivers to operate at speed of up to 56-Gbps, which has promoted the recent development of high-speed I/O standards using fourlevel pulse modulation (PAM-4) [1], [2]. In PAM-4 signaling, four levels are used to represent 2-bit information (LSB and MSB), which doubles the bandwidth utilization compared with the non-return-to-zero (NRZ) signaling. The increase of Manuscript

This paper presents a quad-channel 1.25-10.3125 Gbps wireline transceiver implemented in 40 nm CMOS technology. The transmitter consists of a bit width adjustment, a 40:2 multiplexer, a 2:1multiplexer, and a current-mode logic driver with a 3-tap feedforward equalizer. The receiver has a twostage continuous-time linear equalizer, a 2-tap half-rate fully adaptive decision-feedback equalizer, a phase interpolation-based digital clock and data recovery (CDR) followed by a 2:40 demultiplexer, a bit width adaption. The transceiver also supports AC/DC coupling, CDR locking detection, PLL locking detection, loss of signal detection, automatic termination impedance calibration. A ring VCO-based PLL is designed in each lane to save power consumption, and a dual-core LC VCO-based PLL is implemented in each bank to generate a low jitter clock signal. At 10.3125 Gbps, the transceiver can equalize 28 dB Nyquist loss at a bit error rate of 10 −12 , and it consumes 114 mW with a 1.1 V supply. This work presents a high power efficiency of 11.05 mW/Gbps, and the transceiver is suitable for multi-standard applications due to its flexibility and power efficiency.INDEX TERMS Transceiver, feedforward equalizer, continuous-time linear equalizer (CTLE), adaptive decision-feedback equalizer (DFE), clock and data recovery (CDR).

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